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Message-ID: <dfa31cab-1952-e48d-d05c-50d2d44b2f5c@engleder-embedded.com>
Date:   Sat, 24 Sep 2022 21:06:40 +0200
From:   Gerhard Engleder <gerhard@...leder-embedded.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        netdev@...r.kernel.org
Cc:     davem@...emloft.net, kuba@...nel.org, edumazet@...gle.com,
        pabeni@...hat.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, devicetree@...r.kernel.org
Subject: Re: [PATCH net-next v3 2/6] dt-bindings: net: tsnep: Allow additional
 interrupts

On 24.09.22 11:17, Krzysztof Kozlowski wrote:
> On 23/09/2022 22:29, Gerhard Engleder wrote:
>> Additional TX/RX queue pairs require dedicated interrupts. Extend
>> binding with additional interrupts.
>>
>> Signed-off-by: Gerhard Engleder <gerhard@...leder-embedded.com>
>> ---
>>   .../bindings/net/engleder,tsnep.yaml          | 37 ++++++++++++++++++-
>>   1 file changed, 36 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/engleder,tsnep.yaml b/Documentation/devicetree/bindings/net/engleder,tsnep.yaml
>> index 37e08ee744a8..ce1f1bd413c2 100644
>> --- a/Documentation/devicetree/bindings/net/engleder,tsnep.yaml
>> +++ b/Documentation/devicetree/bindings/net/engleder,tsnep.yaml
>> @@ -20,7 +20,23 @@ properties:
>>       maxItems: 1
>>   
>>     interrupts:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 8
>> +
>> +  interrupt-names:
>> +    minItems: 1
>> +    maxItems: 8
>> +    items:
>> +      pattern: '^mac|txrx-[1-7]$'
> 
> No. The order of items must be fixed. Now you allow any combination,
> which is exactly what we do not want.

Ok. I will do it like in 
https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml#L58

>> +    description:
>> +      If more than one interrupt is available, then interrupts are
>> +      identified by their names.
> 
> Not really. Interrupts are fixed, unless explicitly mentioned otherwise.
> 
>> +      "mac" is the main interrupt for basic MAC features and the first
>> +      TX/RX queue pair. If only a single interrupt is available, then
>> +      it is assumed that this interrupt is the "mac" interrupt.
>> +      "txrx-[1-7]" are the interrupts for additional TX/RX queue pairs.
>> +      These interrupt names shall start with index 1 and increment the
>> +      index by 1 with every further TX/RX queue pair.
> 
> Skip last three sentences - they will become redundant after
> implementing proper items.

I will rework description for fixed order.

>>   
>>     dma-coherent: true
>>   
>> @@ -78,4 +94,23 @@ examples:
>>                   };
>>               };
>>           };
> 
> Missing line break.

I will add it.
> Best regards,
> Krzysztof

Thanks!

Gerhard

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