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Message-ID: <YzN3P6NaDhjA1Qrk@colin-ia-desktop>
Date: Tue, 27 Sep 2022 15:20:47 -0700
From: Colin Foster <colin.foster@...advantage.com>
To: Vladimir Oltean <olteanv@...il.com>
Cc: linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, netdev@...r.kernel.org,
Russell King <linux@...linux.org.uk>,
Linus Walleij <linus.walleij@...aro.org>,
UNGLinuxDriver@...rochip.com,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Claudiu Manoil <claudiu.manoil@....com>,
Lee Jones <lee@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Jakub Kicinski <kuba@...nel.org>,
Eric Dumazet <edumazet@...gle.com>,
"David S. Miller" <davem@...emloft.net>,
Florian Fainelli <f.fainelli@...il.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Andrew Lunn <andrew@...n.ch>
Subject: Re: [PATCH v3 net-next 12/14] dt-bindings: net: dsa: ocelot: add
ocelot-ext documentation
On Tue, Sep 27, 2022 at 11:26:00PM +0300, Vladimir Oltean wrote:
> On Sun, Sep 25, 2022 at 05:29:26PM -0700, Colin Foster wrote:
> > ---
> > .../bindings/net/dsa/mscc,ocelot.yaml | 59 +++++++++++++++++++
> > 1 file changed, 59 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml
> > index 8d93ed9c172c..49450a04e589 100644
> > --- a/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml
> > +++ b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml
> > @@ -54,9 +54,22 @@ description: |
> > - phy-mode = "1000base-x": on ports 0, 1, 2, 3
> > - phy-mode = "2500base-x": on ports 0, 1, 2, 3
> >
> > + VSC7412 (Ocelot-Ext):
>
> VSC7512
Oops. Thanks.
>
> > +
> > + The Ocelot family consists of four devices, the VSC7511, VSC7512, VSC7513,
> > + and the VSC7514. The VSC7513 and VSC7514 both have an internal MIPS
> > + processor that natively support Linux. Additionally, all four devices
> > + support control over external interfaces, SPI and PCIe. The Ocelot-Ext
> > + driver is for the external control portion.
> > +
> > + The following PHY interface types are supported:
> > +
> > + - phy-mode = "internal": on ports 0, 1, 2, 3
>
> More PHY interface types are supported. Please document them all.
> It doesn't matter what the driver supports. Drivers and device tree
> blobs should be able to have different lifetimes. A driver which doesn't
> support the SERDES ports should work with a device tree that defines
> them, and a driver that supports the SERDES ports should work with a
> device tree that doesn't.
>
> Similar for the other stuff which isn't documented (interrupts, SERDES
> PHY handles etc). Since there is already an example with vsc7514, you
> know how they need to look, even if they don't work yet on your
> hardware, no?
Understood. My concern was "oh, all these ports are supported in the
documentation, so they must work" when in actuality they won't. But I
understand DTB compatibility.
This is the same thing Krzysztof was saying as well I belive. I'll
update for v4, with apologies.
>
> > +
> > properties:
> > compatible:
> > enum:
> > + - mscc,vsc7512-switch
> > - mscc,vsc9953-switch
> > - pci1957,eef0
> >
> > @@ -258,3 +271,49 @@ examples:
> > };
> > };
> > };
> > + # Ocelot-ext VSC7512
> > + - |
> > + spi {
> > + soc@0 {
> > + compatible = "mscc,vsc7512";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + ethernet-switch@0 {
> > + compatible = "mscc,vsc7512-switch";
> > + reg = <0 0>;
>
> What is the idea behind reg = <0 0> here? I would expect this driver to
> follow the same conventions as Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml.
> The hardware is mostly the same, so the switch portion of the DT bindings
> should be mostly plug and play between the switchdev and the DSA variant.
> So you can pick the "sys" target as the one giving the address of the
> node, and define all targets via "reg" and "reg-names" here.
>
> Like so:
>
> reg = <0x71010000 0x00010000>,
> <0x71030000 0x00010000>,
> <0x71080000 0x00000100>,
> <0x710e0000 0x00010000>,
> <0x711e0000 0x00000100>,
> <0x711f0000 0x00000100>,
> <0x71200000 0x00000100>,
> <0x71210000 0x00000100>,
> <0x71220000 0x00000100>,
> <0x71230000 0x00000100>,
> <0x71240000 0x00000100>,
> <0x71250000 0x00000100>,
> <0x71260000 0x00000100>,
> <0x71270000 0x00000100>,
> <0x71280000 0x00000100>,
> <0x71800000 0x00080000>,
> <0x71880000 0x00010000>,
> <0x71040000 0x00010000>,
> <0x71050000 0x00010000>,
> <0x71060000 0x00010000>;
> reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",
> "port2", "port3", "port4", "port5", "port6",
> "port7", "port8", "port9", "port10", "qsys",
> "ana", "s0", "s1", "s2";
>
> The mfd driver can use these resources or can choose to ignore them, but
> I don't see a reason why the dt-bindings should diverge from vsc7514,
> its closest cousin.
This one I can answer. (from November 2021). Also I'm not saying that my
interpretation is correct. Historically when there are things up for
interpretation, I choose the incorrect path. (case in point... the other
part of this email)
https://patchwork.kernel.org/project/netdevbpf/patch/20211125201301.3748513-4-colin.foster@in-advantage.com/#24620755
'''
The thing with putting the targets in the device tree is that you're
inflicting yourself unnecessary pain. Take a look at
Documentation/devicetree/bindings/net/mscc-ocelot.txt, and notice that
they mark the "ptp" target as optional because it wasn't needed when
they first published the device tree, and now they need to maintain
compatibility with those old blobs. To me that is one of the sillier
reasons why you would not support PTP, because you don't know where your
registers are. And that document is not even up to date, it hasn't been
updated when VCAP ES0, IS1, IS2 were added. I don't think that Horatiu
even bothered to maintain backwards compatibility when he initially
added tc-flower offload for VCAP IS2, and as a result, I did not bother
either when extending it for the S0 and S1 targets. At some point
afterwards, the Microchip people even stopped complaining and just went
along with it. (the story is pretty much told from memory, I'm sorry if
I mixed up some facts). It's pretty messy, and that's what you get for
creating these micro-maps of registers spread through the guts of the
SoC and then a separate reg-name for each. When we worked on the device
tree for LS1028A and then T1040, it was very much a conscious decision
for the driver to have a single, big register map and split it up pretty
much in whichever way it wants to. In fact I think we wouldn't be
having the discussion about how to split things right now if we didn't
have that flexibility.
'''
I'm happy to go any way. The two that make the most sense might be:
micro-maps to make the VSC7512 "switch" portion match the VSC7514. The
ethernet switch portion might still have to ignore these...
A 'mega-map' that would also be ignored by the switch. It would be less
arbitrary than the <0 0> that I went with. Maybe something like
<0x70000000 0x02000000> to at least point to some valid region.
>
> > +
> > + ethernet-ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + label = "cpu";
>
> label = "cpu" is not used, please remove.
Will do. This sounds familiar, so I'm sorry if it fell through the
cracks.
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