[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <8f2e65d0-61b3-f6a9-084b-4c5c0ab1ccd1@amd.com>
Date: Wed, 19 Oct 2022 14:01:18 -0500
From: Tom Lendacky <thomas.lendacky@....com>
To: Raju Rangoju <Raju.Rangoju@....com>, davem@...emloft.net,
kuba@...nel.org, Shyam-sundar.S-k@....com
Cc: netdev@...r.kernel.org, rajesh1.kumar@....com
Subject: Re: [PATCH v2 net 3/5] amd-xgbe: enable PLL_CTL for fixed PHY modes
only
On 10/19/22 13:20, Raju Rangoju wrote:
> PLL control setting(RRC) is needed only in fixed PHY configuration to
> fix the peer-peer issues. Without the PLL control setting, the link up
> takes longer time in a fixed phy configuration.
>
> Driver implements SW RRC for Autoneg On configuration, hence PLL control
> setting (RRC) is not needed for AN On configuration, and can be skipped.
>
> Also, PLL re-initialization is not needed for PHY Power Off and RRCM
s/RRCM/RRC/
> commands. Otherwise, they lead to mailbox errors. Added the changes
> accordingly.
>
> Fixes: daf182d360e5 ("net: amd-xgbe: Toggle PLL settings during rate change")
> Signed-off-by: Raju Rangoju <Raju.Rangoju@....com>
> ---
> Changes since v1:
> - used enums for all mailxbox command and subcommands, pre-patch to this
> contains the enum updates
> - updated the comment section to include RRC command
> - updated the commit message to use RRC instead of RRCM
>
> drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
> index 8cf5d81fca36..b9c65322248a 100644
> --- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
> +++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
> @@ -1979,6 +1979,10 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)
>
> static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)
> {
> + /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */
> + if (pdata->phy.autoneg != AUTONEG_DISABLE)
> + return;
> +
> XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0,
> XGBE_PMA_PLL_CTRL_MASK,
> enable ? XGBE_PMA_PLL_CTRL_ENABLE
> @@ -2029,8 +2033,10 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
> xgbe_phy_rx_reset(pdata);
>
> reenable_pll:
> - /* Enable PLL re-initialization */
> - xgbe_phy_pll_ctrl(pdata, true);
> + /* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */
> + if (cmd != XGBE_MAILBOX_CMD_POWER_OFF &&
> + cmd != XGBE_MAILBOX_CMD_RRCM)
XGBE_MAILBOX_CMD_RRCM isn't defined, so this patch won't build.
Thanks,
Tom
> + xgbe_phy_pll_ctrl(pdata, true);
> }
>
> static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)
Powered by blists - more mailing lists