lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 24 Oct 2022 22:18:41 +0000
From:   "Keller, Jacob E" <jacob.e.keller@...el.com>
To:     Jakub Kicinski <kuba@...nel.org>,
        David Miller <davem@...emloft.net>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "Laba, SlawomirX" <slawomirx.laba@...el.com>,
        "Jaron, MichalX" <michalx.jaron@...el.com>,
        "Palczewski, Mateusz" <mateusz.palczewski@...el.com>,
        "G, GurucharanX" <gurucharanx.g@...el.com>
Subject: RE: [PATCH v2 1/3] i40e: Fix ethtool rx-flow-hash setting for X722



> -----Original Message-----
> From: Keller, Jacob E <jacob.e.keller@...el.com>
> Sent: Monday, October 24, 2022 3:05 AM
> To: Jakub Kicinski <kuba@...nel.org>; David Miller <davem@...emloft.net>
> Cc: netdev@...r.kernel.org; Laba, SlawomirX <slawomirx.laba@...el.com>;
> Jaron, MichalX <michalx.jaron@...el.com>; Palczewski, Mateusz
> <mateusz.palczewski@...el.com>; G, GurucharanX <gurucharanx.g@...el.com>;
> Keller, Jacob E <jacob.e.keller@...el.com>
> Subject: [PATCH v2 1/3] i40e: Fix ethtool rx-flow-hash setting for X722
> 

Fix one thing, screw up another... I forgot to tag these as [net]..

> From: Slawomir Laba <slawomirx.laba@...el.com>
> 
> When enabling flow type for RSS hash via ethtool:
> 
> ethtool -N $pf rx-flow-hash tcp4|tcp6|udp4|udp6 s|d
> 
> the driver would fail to setup this setting on X722
> device since it was using the mask on the register
> dedicated for X710 devices.
> 
> Apply a different mask on the register when setting the
> RSS hash for the X722 device.
> 
> When displaying the flow types enabled via ethtool:
> 
> ethtool -n $pf rx-flow-hash tcp4|tcp6|udp4|udp6
> 
> the driver would print wrong values for X722 device.
> 
> Fix this issue by testing masks for X722 device in
> i40e_get_rss_hash_opts function.
> 
> Fixes: eb0dd6e4a3b3 ("i40e: Allow RSS Hash set with less than four parameters")
> Signed-off-by: Slawomir Laba <slawomirx.laba@...el.com>
> Signed-off-by: Michal Jaron <michalx.jaron@...el.com>
> Signed-off-by: Mateusz Palczewski <mateusz.palczewski@...el.com>
> Tested-by: Gurucharan <gurucharanx.g@...el.com> (A Contingent worker at
> Intel)
> Signed-off-by: Jacob Keller <jacob.e.keller@...el.com>
> ---
> Changes since v1
> * Rebased to fix conflicts, sent as series properly
> * Added my missing signed-off-by
> 
>  .../net/ethernet/intel/i40e/i40e_ethtool.c    | 31 ++++++++++++++-----
>  drivers/net/ethernet/intel/i40e/i40e_type.h   |  4 +++
>  2 files changed, 27 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
> b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
> index 87f36d1ce800..314ef40aa260 100644
> --- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
> +++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
> @@ -3185,10 +3185,17 @@ static int i40e_get_rss_hash_opts(struct i40e_pf *pf,
> struct ethtool_rxnfc *cmd)
> 
>  		if (cmd->flow_type == TCP_V4_FLOW ||
>  		    cmd->flow_type == UDP_V4_FLOW) {
> -			if (i_set & I40E_L3_SRC_MASK)
> -				cmd->data |= RXH_IP_SRC;
> -			if (i_set & I40E_L3_DST_MASK)
> -				cmd->data |= RXH_IP_DST;
> +			if (hw->mac.type == I40E_MAC_X722) {
> +				if (i_set & I40E_X722_L3_SRC_MASK)
> +					cmd->data |= RXH_IP_SRC;
> +				if (i_set & I40E_X722_L3_DST_MASK)
> +					cmd->data |= RXH_IP_DST;
> +			} else {
> +				if (i_set & I40E_L3_SRC_MASK)
> +					cmd->data |= RXH_IP_SRC;
> +				if (i_set & I40E_L3_DST_MASK)
> +					cmd->data |= RXH_IP_DST;
> +			}
>  		} else if (cmd->flow_type == TCP_V6_FLOW ||
>  			  cmd->flow_type == UDP_V6_FLOW) {
>  			if (i_set & I40E_L3_V6_SRC_MASK)
> @@ -3546,12 +3553,15 @@ static int i40e_get_rxnfc(struct net_device *netdev,
> struct ethtool_rxnfc *cmd,
> 
>  /**
>   * i40e_get_rss_hash_bits - Read RSS Hash bits from register
> + * @hw: hw structure
>   * @nfc: pointer to user request
>   * @i_setc: bits currently set
>   *
>   * Returns value of bits to be set per user request
>   **/
> -static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
> +static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
> +				  struct ethtool_rxnfc *nfc,
> +				  u64 i_setc)
>  {
>  	u64 i_set = i_setc;
>  	u64 src_l3 = 0, dst_l3 = 0;
> @@ -3570,8 +3580,13 @@ static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc
> *nfc, u64 i_setc)
>  		dst_l3 = I40E_L3_V6_DST_MASK;
>  	} else if (nfc->flow_type == TCP_V4_FLOW ||
>  		  nfc->flow_type == UDP_V4_FLOW) {
> -		src_l3 = I40E_L3_SRC_MASK;
> -		dst_l3 = I40E_L3_DST_MASK;
> +		if (hw->mac.type == I40E_MAC_X722) {
> +			src_l3 = I40E_X722_L3_SRC_MASK;
> +			dst_l3 = I40E_X722_L3_DST_MASK;
> +		} else {
> +			src_l3 = I40E_L3_SRC_MASK;
> +			dst_l3 = I40E_L3_DST_MASK;
> +		}
>  	} else {
>  		/* Any other flow type are not supported here */
>  		return i_set;
> @@ -3686,7 +3701,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf,
> struct ethtool_rxnfc *nfc)
>  					       flow_pctype)) |
>  			((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
>  					       flow_pctype)) << 32);
> -		i_set = i40e_get_rss_hash_bits(nfc, i_setc);
> +		i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
>  		i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
>  				  (u32)i_set);
>  		i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
> diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h
> b/drivers/net/ethernet/intel/i40e/i40e_type.h
> index 7b3f30beb757..388c3d36d96a 100644
> --- a/drivers/net/ethernet/intel/i40e/i40e_type.h
> +++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
> @@ -1404,6 +1404,10 @@ struct i40e_lldp_variables {
>  #define I40E_PFQF_CTL_0_HASHLUTSIZE_512	0x00010000
> 
>  /* INPUT SET MASK for RSS, flow director, and flexible payload */
> +#define I40E_X722_L3_SRC_SHIFT		49
> +#define I40E_X722_L3_SRC_MASK		(0x3ULL <<
> I40E_X722_L3_SRC_SHIFT)
> +#define I40E_X722_L3_DST_SHIFT		41
> +#define I40E_X722_L3_DST_MASK		(0x3ULL <<
> I40E_X722_L3_DST_SHIFT)
>  #define I40E_L3_SRC_SHIFT		47
>  #define I40E_L3_SRC_MASK		(0x3ULL << I40E_L3_SRC_SHIFT)
>  #define I40E_L3_V6_SRC_SHIFT		43
> 
> base-commit: c99f0f7e68376dda5df8db7950cd6b67e73c6d3c
> --
> 2.38.0.83.gd420dda05763

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ