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Date:   Fri, 28 Oct 2022 10:21:23 +0000
From:   Biju Das <biju.das.jz@...renesas.com>
To:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Wolfgang Grandegger <wg@...ndegger.com>,
        Marc Kleine-Budde <mkl@...gutronix.de>
CC:     Ulrich Hecht <uli+renesas@...nd.eu>,
        "linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH] can: rcar_canfd: Add missing ECC error checks for
 channels 2-7

Hi Geert,

> Subject: [PATCH] can: rcar_canfd: Add missing ECC error checks for
> channels 2-7
> 
> When introducing support for R-Car V3U, which has 8 instead of 2
> channels, the ECC error bitmask was extended to take into account the
> extra channels, but rcar_canfd_global_error() was not updated to act
> upon the extra bits.
> 
> Replace the RCANFD_GERFL_EEF[01] macros by a new macro that takes the
> channel number, fixing R-Car V3U while simplifying the code.
> 
> Fixes: 45721c406dcf50d4 ("can: rcar_canfd: Add support for r8a779a0
> SoC")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> ---
> Compile-tested only.
> 
> This patch conflicts with "[PATCH v3 6/6] can: rcar_canfd: Add
> has_gerfl_eef to struct rcar_canfd_hw_info"[1].  Sorry for that.

Ok. I will add dependency on 6/6 with this patch.

Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Cheers,
Biju

> 
> [1]
> ---
>  drivers/net/can/rcar/rcar_canfd.c | 13 ++++---------
>  1 file changed, 4 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/net/can/rcar/rcar_canfd.c
> b/drivers/net/can/rcar/rcar_canfd.c
> index 710bd0e9c3c08c02..7cca9b7507cc6805 100644
> --- a/drivers/net/can/rcar/rcar_canfd.c
> +++ b/drivers/net/can/rcar/rcar_canfd.c
> @@ -81,8 +81,7 @@ enum rcanfd_chip_id {
> 
>  /* RSCFDnCFDGERFL / RSCFDnGERFL */
>  #define RCANFD_GERFL_EEF0_7		GENMASK(23, 16)
> -#define RCANFD_GERFL_EEF1		BIT(17)
> -#define RCANFD_GERFL_EEF0		BIT(16)
> +#define RCANFD_GERFL_EEF(ch)		BIT(16 + (ch))
>  #define RCANFD_GERFL_CMPOF		BIT(3)	/* CAN FD only */
>  #define RCANFD_GERFL_THLES		BIT(2)
>  #define RCANFD_GERFL_MES		BIT(1)
> @@ -90,7 +89,7 @@ enum rcanfd_chip_id {
> 
>  #define RCANFD_GERFL_ERR(gpriv, x) \
>  	((x) & (reg_v3u(gpriv, RCANFD_GERFL_EEF0_7, \
> -			RCANFD_GERFL_EEF0 | RCANFD_GERFL_EEF1) | \
> +			RCANFD_GERFL_EEF(0) | RCANFD_GERFL_EEF(1)) | \
>  		RCANFD_GERFL_MES | \
>  		((gpriv)->fdmode ? RCANFD_GERFL_CMPOF : 0)))
> 
> @@ -936,12 +935,8 @@ static void rcar_canfd_global_error(struct
> net_device *ndev)
>  	u32 ridx = ch + RCANFD_RFFIFO_IDX;
> 
>  	gerfl = rcar_canfd_read(priv->base, RCANFD_GERFL);
> -	if ((gerfl & RCANFD_GERFL_EEF0) && (ch == 0)) {
> -		netdev_dbg(ndev, "Ch0: ECC Error flag\n");
> -		stats->tx_dropped++;
> -	}
> -	if ((gerfl & RCANFD_GERFL_EEF1) && (ch == 1)) {
> -		netdev_dbg(ndev, "Ch1: ECC Error flag\n");
> +	if (gerfl & RCANFD_GERFL_EEF(ch)) {
> +		netdev_dbg(ndev, "Ch%u: ECC Error flag\n", ch);
>  		stats->tx_dropped++;
>  	}
>  	if (gerfl & RCANFD_GERFL_MES) {


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