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Date: Mon, 31 Oct 2022 18:10:47 +0800 From: Chester Lin <clin@...e.com> To: Giuseppe Cavallaro <peppe.cavallaro@...com>, Alexandre Torgue <alexandre.torgue@...s.st.com>, Jose Abreu <joabreu@...opsys.com>, "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Jan Petrous <jan.petrous@....com>, Ondrej Spacek <ondrej.spacek@....com>, Ghennadi Procopciuc <Ghennadi.Procopciuc@....com> Cc: Chester Lin <clin@...e.com>, netdev@...r.kernel.org, s32@....com, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, Andreas Färber <afaerber@...e.de>, Matthias Brugger <mbrugger@...e.com> Subject: [PATCH 0/5] Add GMAC support for S32 SoC family Hello, Here I want to introduce a new patch series, which aims to support GMAC functions on S32 SoCs, such as S32G2. This series is originally from NXP's implementation on CodeAurora[1] and it will be required by upstream kernel to configure platform settings at the DWMAC glue layer before activating the DWMAC core on different S32G boards. In this patchset I also introduce more register fields needed by S32 SoCs, such as higher CSR clock ranges and cache coherency settings. For more information please see NXP's GMACSUBSYS Reference Manual[2]. Currently, the whole architecture relies on FDTs offered by ATF[3] on CodeAurora to keep the flexibility of handling multiple S32 platforms since now S32 clks can be triggered via the ARM SCMI clock protocol and clk IDs/ settings can vary according to different board designs. To ensure that the driver can work properly, the dt-binding schemas in this patchset is still required as a reference. Thanks, Chester [1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/net/ethernet/stmicro/stmmac?h=bsp34.0-5.10.120-rt [2] https://www.nxp.com/webapp/Download?colCode=GMACSUBSYSRM [3] https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/tag/?h=bsp34.0-2.5 Chester Lin (5): dt-bindings: net: snps, dwmac: add NXP S32CC support dt-bindings: net: add schema for NXP S32CC dwmac glue driver net: stmmac: Add CSR clock 500Mhz/800Mhz support net: stmmac: Add AXI4 ACE control support net: stmmac: Add NXP S32 SoC family support .../bindings/net/nxp,s32cc-dwmac.yaml | 145 ++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 5 +- drivers/net/ethernet/stmicro/stmmac/Kconfig | 13 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + drivers/net/ethernet/stmicro/stmmac/common.h | 2 + .../net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 318 ++++++++++++++++++ .../net/ethernet/stmicro/stmmac/dwmac4_dma.c | 10 + .../net/ethernet/stmicro/stmmac/dwmac4_dma.h | 4 +- drivers/net/ethernet/stmicro/stmmac/hwif.h | 5 + .../net/ethernet/stmicro/stmmac/stmmac_main.c | 7 + include/linux/stmmac.h | 9 + 11 files changed, 516 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c -- 2.37.3
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