Date:   Fri,  4 Nov 2022 17:35:15 +0530
From:   Sriranjani P <sriranjani.p@...sung.com>
To:     peppe.cavallaro@...com, alexandre.torgue@...s.st.com,
        joabreu@...opsys.com, davem@...emloft.net, edumazet@...gle.com,
        kuba@...nel.org, pabeni@...hat.com, mcoquelin.stm32@...il.com,
        richardcochran@...il.com
Cc:     netdev@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Sriranjani P <sriranjani.p@...sung.com>,
        Chandrasekar R <rcsekar@...sung.com>,
        Suresh Siddha <ssiddha@...la.com>
Subject: [PATCH 2/4] net: stmmac: dwc-qos: Add FSD EQoS support

The FSD SoC contains two instance of the Synopsys DWC ethernet QOS IP core.
The binding that it uses is slightly different from existing ones because
of the integration (clocks, resets).

For FSD SoC, a mux switch is needed between internal and external clocks.
By default after reset internal clock is used but for receiving packets
properly, external clock is needed. Mux switch to external clock happens
only when the external clock is present.

Signed-off-by: Chandrasekar R <rcsekar@...sung.com>
Signed-off-by: Suresh Siddha <ssiddha@...la.com>
Signed-off-by: Sriranjani P <sriranjani.p@...sung.com>
---
 .../stmicro/stmmac/dwmac-dwc-qos-eth.c        | 229 ++++++++++++++++++
 .../net/ethernet/stmicro/stmmac/stmmac_main.c |  12 +
 include/linux/stmmac.h                        |   1 +
 3 files changed, 242 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
index 80efdeeb0b59..0a60fe3e1909 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -20,6 +20,7 @@
 #include <linux/platform_device.h>
 #include <linux/reset.h>
 #include <linux/stmmac.h>
+#include <linux/regmap.h>
 
 #include "stmmac_platform.h"
 #include "dwmac4.h"
@@ -37,6 +38,44 @@ struct tegra_eqos {
 	struct gpio_desc *reset;
 };
 
+enum fsd_rxmux_clk {
+	FSD_RXCLK_MUX = 7,
+	FSD_RXCLK_EXTERNAL,
+	FSD_RXCLK_INTERNAL
+};
+
+struct fsd_eqos_plat_data {
+	const struct fsd_eqos_variant *fsd_eqos_instance_variant;
+	struct clk_bulk_data *clks;
+	struct device *dev;
+	int instance_num;
+};
+
+struct fsd_eqos_variant {
+	const char * const *clk_list;
+	int num_clks;
+};
+
+static const char * const fsd_eqos_instance_0_clk[] = {
+	"ptp_ref", "master_bus", "slave_bus", "tx", "rx"
+};
+
+static const char * const fsd_eqos_instance_1_clk[] = {
+	"ptp_ref", "master_bus", "slave_bus", "tx", "rx", "master2_bus",
+	"slave2_bus", "eqos_rxclk_mux", "eqos_phyrxclk", "dout_peric_rgmii_clk"
+};
+
+static const struct fsd_eqos_variant fsd_eqos_clk_info[] = {
+	{
+		.clk_list = fsd_eqos_instance_0_clk,
+		.num_clks = ARRAY_SIZE(fsd_eqos_instance_0_clk)
+	},
+	{
+		.clk_list = fsd_eqos_instance_1_clk,
+		.num_clks = ARRAY_SIZE(fsd_eqos_instance_1_clk)
+	},
+};
+
 static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
 				   struct plat_stmmacenet_data *plat_dat)
 {
@@ -267,6 +306,190 @@ static int tegra_eqos_init(struct platform_device *pdev, void *priv)
 	return 0;
 }
 
+static int dwc_eqos_rxmux_setup(void *priv, bool external)
+{
+	struct fsd_eqos_plat_data *plat = priv;
+
+	/* doesn't support RX clock mux */
+	if (!plat->clks[FSD_RXCLK_MUX].clk)
+		return 0;
+
+	if (external)
+		return clk_set_parent(plat->clks[FSD_RXCLK_MUX].clk,
+				      plat->clks[FSD_RXCLK_EXTERNAL].clk);
+	else
+		return clk_set_parent(plat->clks[FSD_RXCLK_MUX].clk,
+				      plat->clks[FSD_RXCLK_INTERNAL].clk);
+}
+
+static int dwc_eqos_setup_rxclock(struct platform_device *pdev)
+{
+	struct device_node *np = pdev->dev.of_node;
+
+	if (np && of_property_read_bool(np, "rx-clock-mux")) {
+		unsigned int reg, val;
+		struct regmap *syscon = syscon_regmap_lookup_by_phandle(np,
+			"rx-clock-mux");
+
+		if (IS_ERR(syscon)) {
+			dev_err(&pdev->dev, "couldn't get the rx-clock-mux syscon!\n");
+			return PTR_ERR(syscon);
+		}
+
+		if (of_property_read_u32_index(np, "rx-clock-mux", 1, &reg)) {
+			dev_err(&pdev->dev, "couldn't get the rx-clock-mux reg. offset!\n");
+			return -EINVAL;
+		}
+
+		if (of_property_read_u32_index(np, "rx-clock-mux", 2, &val)) {
+			dev_err(&pdev->dev, "couldn't get the rx-clock-mux reg. val!\n");
+			return -EINVAL;
+		}
+
+		regmap_write(syscon, reg, val);
+	}
+
+	if (np && of_property_read_bool(np, "rx-clock-skew")) {
+		unsigned int reg, val;
+		struct regmap *syscon = syscon_regmap_lookup_by_phandle(np,
+					"rx-clock-skew");
+
+		if (IS_ERR(syscon)) {
+			dev_err(&pdev->dev, "couldn't get the rx-clock-skew syscon!\n");
+			return PTR_ERR(syscon);
+		}
+
+		if (of_property_read_u32_index(np, "rx-clock-skew", 1, &reg)) {
+			dev_err(&pdev->dev, "couldn't get the rx-clock-skew reg. offset!\n");
+			return -EINVAL;
+		}
+
+		if (of_property_read_u32_index(np, "rx-clock-skew", 2, &val)) {
+			dev_err(&pdev->dev, "couldn't get the rx-clock-skew reg. val!\n");
+			return -EINVAL;
+		}
+
+		regmap_write(syscon, reg, val);
+	}
+
+	if (np && of_property_read_bool(np, "tx-clock-mux")) {
+		unsigned int reg, val;
+		struct regmap *syscon = syscon_regmap_lookup_by_phandle(np,
+			"tx-clock-mux");
+
+		if (IS_ERR(syscon)) {
+			dev_err(&pdev->dev, "couldn't get the tx-clock-mux syscon!\n");
+			return -EINVAL;
+		}
+
+		if (of_property_read_u32_index(np, "tx-clock-mux", 1, &reg)) {
+			dev_err(&pdev->dev, "couldn't get the tx-clock-mux reg. offset!\n");
+			return -EINVAL;
+		}
+
+		if (of_property_read_u32_index(np, "tx-clock-mux", 2, &val)) {
+			dev_err(&pdev->dev, "couldn't get the tx-clock-mux reg. val!\n");
+			return -EINVAL;
+		}
+
+		regmap_write(syscon, reg, val);
+	}
+
+	return 0;
+}
+
+static int fsd_eqos_clk_init(struct fsd_eqos_plat_data *plat,
+			     struct plat_stmmacenet_data *data)
+{
+	int ret, i;
+
+	const struct fsd_eqos_variant *fsd_eqos_variant_data = plat->fsd_eqos_instance_variant;
+
+	plat->clks = devm_kcalloc(plat->dev, fsd_eqos_variant_data->num_clks,
+				  sizeof(*plat->clks), GFP_KERNEL);
+	if (!plat->clks)
+		return -ENOMEM;
+
+	for (i = 0; i < fsd_eqos_variant_data->num_clks; i++)
+		plat->clks[i].id = fsd_eqos_variant_data->clk_list[i];
+
+	ret = devm_clk_bulk_get(plat->dev, fsd_eqos_variant_data->num_clks, plat->clks);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int fsd_clks_endisable(void *priv, bool enabled)
+{
+	struct fsd_eqos_plat_data *plat = priv;
+	int ret;
+
+	const struct fsd_eqos_variant *fsd_eqos_variant_data = plat->fsd_eqos_instance_variant;
+
+	if (enabled) {
+		ret = clk_bulk_prepare_enable(fsd_eqos_variant_data->num_clks, plat->clks);
+		if (ret) {
+			dev_err(plat->dev, "failed to enable clks, err = %d\n", ret);
+			return ret;
+		}
+	} else {
+		clk_bulk_disable_unprepare(fsd_eqos_variant_data->num_clks, plat->clks);
+	}
+
+	return 0;
+}
+
+static int fsd_eqos_probe(struct platform_device *pdev,
+			  struct plat_stmmacenet_data *data,
+			  struct stmmac_resources *res)
+{
+	struct fsd_eqos_plat_data *priv_plat;
+	struct device_node *np = pdev->dev.of_node;
+	int ret;
+
+	priv_plat = devm_kzalloc(&pdev->dev, sizeof(*priv_plat), GFP_KERNEL);
+	if (!priv_plat) {
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	priv_plat->dev = &pdev->dev;
+	data->bus_id = of_alias_get_id(np, "eth");
+	priv_plat->instance_num = data->bus_id;
+
+	priv_plat->fsd_eqos_instance_variant = &fsd_eqos_clk_info[data->bus_id];
+
+	ret = fsd_eqos_clk_init(priv_plat, data);
+
+	data->bsp_priv = priv_plat;
+	data->clks_config = fsd_clks_endisable;
+	data->rxmux_setup = dwc_eqos_rxmux_setup;
+
+	ret = fsd_clks_endisable(priv_plat, true);
+	if (ret)
+		goto error;
+
+	ret = dwc_eqos_setup_rxclock(pdev);
+	if (ret)
+		dev_err_probe(&pdev->dev, ret, "ERROR:Unable to setup rxclock\n");
+out:
+	return 0;
+
+error:
+	priv_plat = ERR_PTR(ret);
+	goto out;
+}
+
+static int fsd_eqos_remove(struct platform_device *pdev)
+{
+	struct fsd_eqos_plat_data *priv_plat = get_stmmac_bsp_priv(&pdev->dev);
+
+	fsd_clks_endisable(priv_plat, false);
+
+	return 0;
+}
+
 static int tegra_eqos_probe(struct platform_device *pdev,
 			    struct plat_stmmacenet_data *data,
 			    struct stmmac_resources *res)
@@ -415,6 +638,11 @@ static const struct dwc_eth_dwmac_data tegra_eqos_data = {
 	.remove = tegra_eqos_remove,
 };
 
+static const struct dwc_eth_dwmac_data fsd_eqos_data = {
+	.probe = fsd_eqos_probe,
+	.remove = fsd_eqos_remove,
+};
+
 static int dwc_eth_dwmac_probe(struct platform_device *pdev)
 {
 	const struct dwc_eth_dwmac_data *data;
@@ -493,6 +721,7 @@ static int dwc_eth_dwmac_remove(struct platform_device *pdev)
 static const struct of_device_id dwc_eth_dwmac_match[] = {
 	{ .compatible = "snps,dwc-qos-ethernet-4.10", .data = &dwc_qos_data },
 	{ .compatible = "nvidia,tegra186-eqos", .data = &tegra_eqos_data },
+	{ .compatible = "tesla,dwc-qos-ethernet-4.21", .data = &fsd_eqos_data },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 8273e6a175c8..7be95a876c32 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3831,6 +3831,9 @@ static int __stmmac_open(struct net_device *dev,
 	netif_tx_start_all_queues(priv->dev);
 	stmmac_enable_all_dma_irq(priv);
 
+	if (priv->plat->rxmux_setup)
+		priv->plat->rxmux_setup(priv->plat->bsp_priv, true);
+
 	return 0;
 
 irq_error:
@@ -3884,6 +3887,9 @@ static int stmmac_release(struct net_device *dev)
 	struct stmmac_priv *priv = netdev_priv(dev);
 	u32 chan;
 
+	if (priv->plat->rxmux_setup)
+		priv->plat->rxmux_setup(priv->plat->bsp_priv, false);
+
 	if (device_may_wakeup(priv->device))
 		phylink_speed_down(priv->phylink, false);
 	/* Stop and disconnect the PHY */
@@ -7383,6 +7389,9 @@ int stmmac_suspend(struct device *dev)
 	if (!ndev || !netif_running(ndev))
 		return 0;
 
+	if (priv->plat->rxmux_setup)
+		priv->plat->rxmux_setup(priv->plat->bsp_priv, false);
+
 	mutex_lock(&priv->lock);
 
 	netif_device_detach(ndev);
@@ -7546,6 +7555,9 @@ int stmmac_resume(struct device *dev)
 	mutex_unlock(&priv->lock);
 	rtnl_unlock();
 
+	if (priv->plat->rxmux_setup)
+		priv->plat->rxmux_setup(priv->plat->bsp_priv, true);
+
 	netif_device_attach(ndev);
 
 	return 0;
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index fb2e88614f5d..8867646917e0 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -229,6 +229,7 @@ struct plat_stmmacenet_data {
 	void (*ptp_clk_freq_config)(void *priv);
 	int (*init)(struct platform_device *pdev, void *priv);
 	void (*exit)(struct platform_device *pdev, void *priv);
+	int (*rxmux_setup)(void *priv, bool external);
 	struct mac_device_info *(*setup)(void *priv);
 	int (*clks_config)(void *priv, bool enabled);
 	int (*crosststamp)(ktime_t *device, struct system_counterval_t *system,
-- 
2.17.1

Powered by blists - more mailing lists