netdev - Re: [PATCH 2/9] net: dsa: mv88e6xxx: account for PHY base address offset in dual chip mode

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Message-ID: <20221110180233.3ce3dd06@wsk>
Date:   Thu, 10 Nov 2022 18:02:33 +0100
From:   Lukasz Majewski <lukma@...x.de>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org,
        Matthias Schiffer <matthias.schiffer@...tq-group.com>
Subject: Re: [PATCH 2/9] net: dsa: mv88e6xxx: account for PHY base address
 offset in dual chip mode

Hi Andrew,

> On Tue, Nov 08, 2022 at 09:23:23AM +0100, Lukasz Majewski wrote:
> > From: Matthias Schiffer <matthias.schiffer@...tq-group.com>
> > 
> > In dual chip mode (6250 family), not only global and port registers
> > are shifted by sw_addr, but also the PHY addresses. Account for
> > this in the IRQ mapping.  
> 
> > +++ b/drivers/net/dsa/mv88e6xxx/smi.c
> > @@ -186,5 +186,9 @@ int mv88e6xxx_smi_init(struct mv88e6xxx_chip
> > *chip, if (chip->smi_ops->init)
> >  		return chip->smi_ops->init(chip);
> >  
> > +	chip->phy_base_addr = chip->info->phy_base_addr;
> > +	if (chip->info->dual_chip)
> > +		chip->phy_base_addr += sw_addr;
> > +
> >  	return 0;  
> 
> 
> Again, reviewing first to last, i assume the will be a patch soon
> implementing get_phy_address(), and it will have the same logic. Why
> not call it here, a default implementation which returns
> info->phy_base_addr, and a version for 6250 which returns sw_addr.
> 

I will squash Matthias patches and prepare new set of them with proper
operation's ordering.

> 	Andrew


Best regards,

Lukasz Majewski

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