lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 11 Nov 2022 11:13:00 +0800
From:   "mengyuanlou@...-swift.com" <mengyuanlou@...-swift.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     netdev@...r.kernel.org, jiawenwu@...stnetic.com
Subject: Re: [PATCH net-next 4/5] net: ngbe: Initialize phy information



> 2022年11月9日 05:10,Andrew Lunn <andrew@...n.ch> 写道:
> 
>> +/**
>> + *  ngbe_phy_read_reg_mdi - Reads a val from an external PHY register
>> + *  @hw: pointer to hardware structure
>> + *  @reg_addr: 32 bit address of PHY register to read
>> + **/
>> +static u16 ngbe_phy_read_reg_mdi(struct ngbe_hw *hw, u32 reg_addr)
>> +{
>> +	u32 command = 0, device_type = 0;
>> +	struct wx_hw *wxhw = &hw->wxhw;
>> +	u32 phy_addr = 0;
>> +	u16 phy_data = 0;
>> +	u32 val = 0;
>> +	int ret = 0;
>> +
>> +	/* setup and write the address cycle command */
>> +	command = NGBE_MSCA_RA(reg_addr) |
>> +		  NGBE_MSCA_PA(phy_addr) |
>> +		  NGBE_MSCA_DA(device_type);
>> +	wr32(wxhw, NGBE_MSCA, command);
>> +
>> +	command = NGBE_MSCC_CMD(NGBE_MSCA_CMD_READ) |
>> +		  NGBE_MSCC_BUSY |
>> +		  NGBE_MDIO_CLK(6);
>> +	wr32(wxhw, NGBE_MSCC, command);
>> +
>> +	/* wait to complete */
>> +	ret = read_poll_timeout(rd32, val, val & NGBE_MSCC_BUSY, 1000,
>> +				20000, false, wxhw, NGBE_MSCC);
>> +	if (ret)
>> +		wx_dbg(wxhw, "PHY address command did not complete.\n");
>> +
>> +	/* read data from MSCC */
>> +	phy_data = (u16)rd32(wxhw, NGBE_MSCC);
>> +
>> +	return phy_data;
>> +}
>> +
>> +/**
>> + *  ngbe_phy_write_reg_mdi - Writes a val to external PHY register
>> + *  @hw: pointer to hardware structure
>> + *  @reg_addr: 32 bit PHY register to write
>> + *  @phy_data: Data to write to the PHY register
>> + **/
>> +static void ngbe_phy_write_reg_mdi(struct ngbe_hw *hw, u32 reg_addr, u16 phy_data)
>> +{
>> +	u32 command = 0, device_type = 0;
>> +	struct wx_hw *wxhw = &hw->wxhw;
>> +	u32 phy_addr = 0;
>> +	int ret = 0;
>> +	u16 val = 0;
>> +
>> +	/* setup and write the address cycle command */
>> +	command = NGBE_MSCA_RA(reg_addr) |
>> +		  NGBE_MSCA_PA(phy_addr) |
>> +		  NGBE_MSCA_DA(device_type);
>> +	wr32(wxhw, NGBE_MSCA, command);
>> +
>> +	command = phy_data |
>> +		  NGBE_MSCC_CMD(NGBE_MSCA_CMD_WRITE) |
>> +		  NGBE_MSCC_BUSY |
>> +		  NGBE_MDIO_CLK(6);
>> +	wr32(wxhw, NGBE_MSCC, command);
>> +
>> +	/* wait to complete */
>> +	ret = read_poll_timeout(rd32, val, val & NGBE_MSCC_BUSY, 1000,
>> +				20000, false, wxhw, NGBE_MSCC);
>> +	if (ret)
>> +		wx_dbg(wxhw, "PHY address command did not complete.\n");
>> +}
> 
> This appears to be an MDIO bus? Although you seem to be limited to
> just 1 of the 32 addresses? Anyway, please create a standard Linux
> MDIO bus driver. The Linux PHY drivers will then drive the PHYs for
> you. You can throw most of this file away.
> 
> 	Andrew
If mdio bus is not directly connected to the cpu mac, but can only be converted through the mac chip.
If we need to add an mdio bus driver, how can we provide access to mdio bus the mdio bus driver?
I haven't found the code in for reference at the moment, could you please provide some reference。
sincere thanks。
	Mengyuan Lou

> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ