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Message-Id: <20221114143755.1241466-1-andy.chiu@sifive.com>
Date: Mon, 14 Nov 2022 22:37:52 +0800
From: Andy Chiu <andy.chiu@...ive.com>
To: davem@...emloft.net, andrew@...n.ch, kuba@...nel.org,
michal.simek@...inx.com, radhey.shyam.pandey@...inx.com
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, robh+dt@...nel.org,
pabeni@...hat.com, edumazet@...gle.com, andy.chiu@...ive.com,
greentime.hu@...ive.com
Subject: [PATCH v3 RESEND net-next 0/3] net: axienet: Use a DT property to configure frequency of the MDIO bus
Some FPGA platforms have to set frequency of the MDIO bus lower than 2.5
MHz. Thus, we use a DT property, which is "clock-frequency", to work
with it at boot time. The default 2.5 MHz would be set if the property
is not pressent. Also, factor out mdio enable/disable functions due to
the api change since 253761a0e61b7.
Changelog:
--- v3 RESEND ---
1. Repost the exact same patch again
--- v3 ---
1. Fix coding style, and make probing of the driver fail if MDC overflow
--- v2 ---
1. Use clock-frequency, as defined in mdio.yaml, to configure MDIO
clock.
2. Only print out frequency if it is set to a non-standard value.
3. Reduce the scope of axienet_mdio_enable and remove
axienet_mdio_disable because no one really uses it anymore.
Andy Chiu (3):
net: axienet: Unexport and remove unused mdio functions
net: axienet: set mdio clock according to bus-frequency
dt-bindings: describe the support of "clock-frequency" in mdio
.../bindings/net/xilinx_axienet.txt | 2 +
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 -
.../net/ethernet/xilinx/xilinx_axienet_mdio.c | 57 +++++++++++--------
3 files changed, 34 insertions(+), 27 deletions(-)
--
2.36.0
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