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Message-ID: <e9cc651f-4855-0081-0e62-bd8eae2a15d9@seco.com>
Date:   Mon, 14 Nov 2022 10:08:37 -0500
From:   Sean Anderson <sean.anderson@...o.com>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     Tim Harvey <tharvey@...eworks.com>,
        netdev <netdev@...r.kernel.org>,
        Russell King <linux@...linux.org.uk>,
        "David S. Miller" <davem@...emloft.net>
Subject: Re: status of rate adaptation

On 11/11/22 19:48, Vladimir Oltean wrote:
> On Fri, Nov 11, 2022 at 05:38:12PM -0500, Sean Anderson wrote:
>> > Something interesting is that when I configured the xmdio node with an
>> > interrupt I ended up in a mode where 5g,2.5g and 1g all worked for at
>> > least 1 test. There was something wrong with my interrupt
>> > configuration (i'm not clear if the AQR113C's interrupt should be
>> > IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_EDGE_FALLING or something different).
>> 
>> NXP use IRQ_TYPE_LEVEL_HIGH on the LS1046ARDB.
> 
> Partly true, but mostly false. What is described in fsl-ls1046a-rdb.dts as:
> 
> 	interrupts = <0 131 4>;
> 
> should really have been described as:
> 
> 	interrupts-extended = <&extirq 0 IRQ_TYPE_LEVEL_LOW>;
> 
> There's a polarity inverter which inverts the signal by default,
> changing what the GIC sees. The first description bypasses it.

Ah. I missed that they described it as going straight to the GIC, skipping
the extirq. Thanks for pointing that out.

--Sean

> So that's not what the problem is in Tim's case.
> 
> As to LEVEL_LOW vs EDGE_FALLING, I suppose the only real difference is
> if the interrupt line is shared with other peripherals?

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