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Message-ID: <e5f9529f-955c-fc28-5d46-c77f23a71d04@intel.com>
Date: Mon, 21 Nov 2022 10:14:27 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Michael Kelley <mikelley@...rosoft.com>, hpa@...or.com,
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Subject: Re: [Patch v3 01/14] x86/ioremap: Fix page aligned size calculation
in __ioremap_caller()
On 11/16/22 10:41, Michael Kelley wrote:
> Current code re-calculates the size after aligning the starting and
> ending physical addresses on a page boundary. But the re-calculation
> also embeds the masking of high order bits that exceed the size of
> the physical address space (via PHYSICAL_PAGE_MASK). If the masking
> removes any high order bits, the size calculation results in a huge
> value that is likely to immediately fail.
>
> Fix this by re-calculating the page-aligned size first. Then mask any
> high order bits using PHYSICAL_PAGE_MASK.
>
> Signed-off-by: Michael Kelley <mikelley@...rosoft.com>
Looks good:
Acked-by: Dave Hansen <dave.hansen@...ux.intel.com>
Although I do agree with Boris that this superficially looks like
something that's important to backport. It would be best to either beef
up the changelog to explain why that's not the case, or to treat this as
an actual fix and submit separately.
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