netdev - Re: [Patch net-next v2 07/13] net: dsa: microchip: ptp: add packet reception timestamping

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Message-ID: <20221207103808.nfkvr2hwv5yud4uc@skbuf>
Date:   Wed, 7 Dec 2022 12:38:08 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     Arun.Ramadoss@...rochip.com
Cc:     andrew@...n.ch, linux-kernel@...r.kernel.org,
        UNGLinuxDriver@...rochip.com, vivien.didelot@...il.com,
        linux@...linux.org.uk, ceggers@...i.de, Tristram.Ha@...rochip.com,
        f.fainelli@...il.com, kuba@...nel.org, edumazet@...gle.com,
        pabeni@...hat.com, richardcochran@...il.com,
        netdev@...r.kernel.org, Woojung.Huh@...rochip.com,
        davem@...emloft.net
Subject: Re: [Patch net-next v2 07/13] net: dsa: microchip: ptp: add packet
 reception timestamping

On Wed, Dec 07, 2022 at 06:00:27AM +0000, Arun.Ramadoss@...rochip.com wrote:
> I looked into the sja1105 and hellcreek rxtstamp() implementation.
> Here, SKB is queued in rxtstamp() and ptp_schedule_worker is started.
> In the work queue, skb is dequeued and current ptp hardware clock is
> read. Using the partial time stamp and phc clock, absolute time stamp
> is calculated and posted.
> In this KSZ implementation, ptp_schedule_worker is used for maintaining
> the ptp software clock which read value from hardware clock every
> second for faster access of clock value.
> 
> Based on the above observation, I have doubt on how to implement. Below
> are the algorithm. Kindly suggest which one to proceed.
> 1. Remove the existing ptp software clock mainpulation using
> ptp_schedule_worker. Instead in the ptp_schedule_worker, dequeue the
> skb and timestamp the rx packets by directly reading from the ptp
> hardware clock.
> 2. Keep the existing implementation, add the rxtstamp() where it will
> not queue skb instead just process the timestamping with using software
> clock and KSZ_SKB_CB()->tstamp.

Search more, you'll find felix_rxtstamp() which is closer to (2) and to
what you need. There, reading the 64-bit PTP time is done in NET_RX
softirq context because the register access is over MMIO. That might
change in the future with the introduction of the SPI controlled VSC7512,
but for now it is a good example.