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Message-ID: <Y5RkcmMxK0rmDHtz@lunn.ch>
Date:   Sat, 10 Dec 2022 11:50:26 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Piergiorgio Beruto <piergiorgio.beruto@...il.com>
Cc:     Kurt Kanzenbach <kurt@...utronix.de>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        peppe.cavallaro@...com, Voon Weifeng <weifeng.voon@...el.com>,
        Rayagond Kokatanur <rayagond@...avyalabs.com>,
        Jose Abreu <Jose.Abreu@...opsys.com>,
        Antonio Borneo <antonio.borneo@...com>,
        Tan Tee Min <tee.min.tan@...el.com>
Subject: Re: [PATCH net] stmmac: fix potential division by 0

On Thu, Dec 08, 2022 at 10:27:56AM +0100, Piergiorgio Beruto wrote:
> > > 
> > > Here's the Altera manual:
> > > 
> > >  https://www.intel.com/content/www/us/en/docs/programmable/683126/21-2/functional-description-of-the-emac.html
> > > 
> > > Table 183 shows the minimum PTP frequencies and also states "Therefore,
> > > a higher PTP clock frequency gives better system performance.".
> > > 
> > > So, I'd say using a clock of 2.5MHz seems possible, but will result in
> > > suboptimal precision.
> > 
> > Thanks for the info. So i seems like the correct fix is to camp to
> > 0xff, rather than mask with 0xff.

> Andrew, given your comment, do you wish me to re-post the patch with
> this fix? Or wait for more feedback first?

Please post a patch. Often the only way to get feedback is to break systems :-(

In this case, clamping actually seems like it could fix systems, not
break them.

      Andrew

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