netdev - Re: [PATCH net v3 2/2] r8169: fix dmar pte write access is not set error

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Date:   Mon, 26 Dec 2022 13:47:57 +0100
From:   Heiner Kallweit <hkallweit1@...il.com>
To:     Chunhao Lin <hau@...ltek.com>
Cc:     netdev@...r.kernel.org, nic_swsd@...ltek.com
Subject: Re: [PATCH net v3 2/2] r8169: fix dmar pte write access is not set
 error

On 26.12.2022 13:31, Chunhao Lin wrote:
> When close device, if wol is enabled, rx will be enabled. When open
> device it will cause rx packet to be dma to the wrong memory address
> after pci_set_master() and system log will show blow messages.
> 
> DMAR: DRHD: handling fault status reg 3
> DMAR: [DMA Write] Request device [02:00.0] PASID ffffffff fault addr
> ffdd4000 [fault reason 05] PTE Write access is not set
> 
> In this patch, driver disable tx/rx when close device. If wol is
> enabled, only enable rx filter and disable rxdv_gate(if support) to
> let hardware only receive packet to fifo but not to dma it.
> 
> Signed-off-by: Chunhao Lin <hau@...ltek.com>

Reviewed-by: Heiner Kallweit <hkallweit1@...il.com>