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Message-ID: <c03cf325b9ab5d0bbf38508336ad0aba6dfbf81b.camel@microchip.com>
Date:   Tue, 10 Jan 2023 14:21:18 +0000
From:   <Arun.Ramadoss@...rochip.com>
To:     <andrew@...n.ch>, <yoshihiro.shimoda.uh@...esas.com>,
        <linux@...linux.org.uk>, <kuba@...nel.org>, <pabeni@...hat.com>,
        <edumazet@...gle.com>, <davem@...emloft.net>,
        <hkallweit1@...il.com>
CC:     <netdev@...r.kernel.org>, <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH net-next v2 1/4] net: phylink: Set host_interfaces for a
 non-sfp PHY

Hi Yoshihiro,
On Tue, 2023-01-10 at 14:02 +0900, Yoshihiro Shimoda wrote:
> If a new flag (ovr_host_interfaces) in the phylink_config is set,
> overwrite the host_interfaces in the phy_device by link_interface.
> 
> Note that an ethernet PHY driver like marvell10g will check
> PHY_INTERFACE_MODE_SGMII in the host_interfaces whther the host
> controller supports a rate matching interface mode or not. So, set
> PHY_INTERFACE_MODE_SGMII to the host_interfaces if it is set in
> the supported_interfaces.
> 
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
> ---
>  drivers/net/phy/phylink.c | 9 +++++++++
>  include/linux/phylink.h   | 3 +++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> index 09cc65c0da93..0d863e55994e 100644
> --- a/drivers/net/phy/phylink.c
> +++ b/drivers/net/phy/phylink.c
> @@ -1809,6 +1809,15 @@ int phylink_fwnode_phy_connect(struct phylink
> *pl,
>  		pl->link_interface = phy_dev->interface;
>  		pl->link_config.interface = pl->link_interface;
>  	}
> +	if (pl->config->ovr_host_interfaces) {
> +		__set_bit(pl->link_interface, phy_dev-
> >host_interfaces);

Blank line before comment will increase the readability.

> +		/* An ethernet PHY driver will check
> PHY_INTERFACE_MODE_SGMII
> +		 * in the host_interfaces whether the host controller
> supports
> +		 * a rate matching interface mode or not.
> +		 */

Commit message description and this comment are same. following code
snippet implies it test the SGMII in supported interfaces and set it in
phy_dev.

> +		if (test_bit(PHY_INTERFACE_MODE_SGMII, pl->config-
> >supported_interfaces))
> +			__set_bit(PHY_INTERFACE_MODE_SGMII, phy_dev-
> >host_interfaces);
> +	}
>  
>  	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
>  				pl->link_interface);
> 

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