[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7148963.18pcnM708K@diego>
Date: Wed, 11 Jan 2023 11:11:24 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Richard Cochran <richardcochran@...il.com>,
Anand Moon <anand@...eble.ai>
Cc: Johan Jonker <jbx6244@...il.com>, Anand Moon <anand@...eble.ai>,
Jagan Teki <jagan@...eble.ai>,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCHv4 linux-next 3/4] Rockchip RV1126 has GMAC 10/100/1000M ethernet controller
Hi,
Am Mittwoch, 11. Januar 2023, 07:48:38 CET schrieb Anand Moon:
> Add Ethernet GMAC node for RV1126 SoC.
>
> Signed-off-by: Anand Moon <anand@...eble.ai>
> Signed-off-by: Jagan Teki <jagan@...eble.ai>
patches 2-4 have this Signed-off-by from Jagan again where he is not
not the author but also not the sender.
Also this patch here, needs a fixed subject with the correct prefixes.
Heiko
> ---
> v4: sort the node as reg adds. update the commit message.
> v3: drop the gmac_clkin_m0 & gmac_clkin_m1 fix clock node which are not
> used, Add SoB of Jagan Teki.
> v2: drop SoB of Jagan Teki.
> ---
> arch/arm/boot/dts/rv1126.dtsi | 49 +++++++++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
> index 1cb43147e90b..1f07d0a4fa73 100644
> --- a/arch/arm/boot/dts/rv1126.dtsi
> +++ b/arch/arm/boot/dts/rv1126.dtsi
> @@ -332,6 +332,55 @@ timer0: timer@...60000 {
> clock-names = "pclk", "timer";
> };
>
> + gmac: ethernet@...40000 {
> + compatible = "rockchip,rv1126-gmac", "snps,dwmac-4.20a";
> + reg = <0xffc40000 0x4000>;
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq", "eth_wake_irq";
> + rockchip,grf = <&grf>;
> + clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>,
> + <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_REF>,
> + <&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
> + <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_PTPREF>;
> + clock-names = "stmmaceth", "mac_clk_rx",
> + "mac_clk_tx", "clk_mac_ref",
> + "aclk_mac", "pclk_mac",
> + "clk_mac_speed", "ptp_ref";
> + resets = <&cru SRST_GMAC_A>;
> + reset-names = "stmmaceth";
> +
> + snps,mixed-burst;
> + snps,tso;
> +
> + snps,axi-config = <&stmmac_axi_setup>;
> + snps,mtl-rx-config = <&mtl_rx_setup>;
> + snps,mtl-tx-config = <&mtl_tx_setup>;
> + status = "disabled";
> +
> + mdio: mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + };
> +
> + stmmac_axi_setup: stmmac-axi-config {
> + snps,wr_osr_lmt = <4>;
> + snps,rd_osr_lmt = <8>;
> + snps,blen = <0 0 0 0 16 8 4>;
> + };
> +
> + mtl_rx_setup: rx-queues-config {
> + snps,rx-queues-to-use = <1>;
> + queue0 {};
> + };
> +
> + mtl_tx_setup: tx-queues-config {
> + snps,tx-queues-to-use = <1>;
> + queue0 {};
> + };
> + };
> +
> emmc: mmc@...50000 {
> compatible = "rockchip,rv1126-dw-mshc", "rockchip,rk3288-dw-mshc";
> reg = <0xffc50000 0x4000>;
>
Powered by blists - more mailing lists