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Message-ID: <2fd5c783-94f1-1896-c6b9-431a754aec14@gmail.com>
Date: Thu, 12 Jan 2023 13:13:51 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: Michael Walle <michael@...le.cc>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...id.au>, Felix Fietkau <nbd@....name>,
John Crispin <john@...ozen.org>,
Sean Wang <sean.wang@...iatek.com>,
Mark Lee <Mark-MC.Lee@...iatek.com>,
Lorenzo Bianconi <lorenzo@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Bryan Whitehead <bryan.whitehead@...rochip.com>,
UNGLinuxDriver@...rochip.com,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Vladimir Oltean <vladimir.oltean@....com>,
Claudiu Manoil <claudiu.manoil@....com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Li Yang <leoyang.li@....com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-mediatek@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
linuxppc-dev@...ts.ozlabs.org, Andrew Lunn <andrew@...n.ch>
Subject: Re: [PATCH net-next 03/10] net: mdio: mux-bcm-iproc: Separate C22 and
C45 transactions
On 1/12/23 07:15, Michael Walle wrote:
> From: Andrew Lunn <andrew@...n.ch>
>
> The MDIO mux broadcom iproc can perform both C22 and C45 transfers.
> Create separate functions for each and register the C45 versions using
> the new API calls.
>
> Signed-off-by: Andrew Lunn <andrew@...n.ch>
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---
> Apparently, in the c45 case, the reg value including the MII_ADDR_C45
> bit is written to the hardware. Looks weird, that a "random" software
> bit is written to a register. Florian is that correct? Also, with this
> patch this flag isn't set anymore.
We should be masking the MII_ADDR_C45 bit because the MDIO_ADDR_OFFSET
only defines bits 0 through 20 as being read/write and bits above being
read-only. In practice, this is probably not making any difference or harm.
--
Florian
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