Message-ID: <20230126133346.61097-1-alexandru.tachici@analog.com>
Date:   Thu, 26 Jan 2023 15:33:43 +0200
From:   Alexandru Tachici <alexandru.tachici@...log.com>
To:     <linux-kernel@...r.kernel.org>
CC:     <netdev@...r.kernel.org>, <davem@...emloft.net>,
        <edumazet@...gle.com>, <kuba@...nel.org>, <pabeni@...hat.com>,
        <richardcochran@...il.com>, <yangyingliang@...wei.com>,
        <weiyongjun1@...wei.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <devicetree@...r.kernel.org>,
        <lennart@...omain.com>
Subject: [net-next v2 0/3] net: ethernet: adi: adin1110: add PTP support

Add control for the PHC inside the ADIN1110/2111.
Device contains a syntonized counter driven by a 120 MHz
clock  with 8 ns resolution.

Time is stored in two registers: a 32bit seconds register and
a 32bit nanoseconds register.

For adjusting the clock timing, device uses an addend register.
Can generate an output signal on the TS_TIMER pin.
For reading the timestamp the current tiem is saved by setting the
TS_CAPT pin via gpio in order to snapshot both seconds and nanoseconds
in different registers that the live ones.

Allow use of hardware RX/TX timestamping.

RX frames are automatically timestamped by the device at hardware
level when the feature is enabled. Time of day is the one used by the
MAC device.

When sending a TX frame to the MAC device, driver needs to send
a custom header ahead of the ethernet one where it specifies where
the MAC device should store the timestamp after the frame has
successfully been sent on the MII line. It has 3 timestamp slots that can
be read afterwards. Host will be notified by the TX_RDY IRQ.

root@...log:~# ethtool -T eth1
Time stamping parameters for eth1:
Capabilities:
	hardware-transmit
	software-transmit
	hardware-receive
	software-receive
	software-system-clock
	hardware-raw-clock
PTP Hardware Clock: 0
Hardware Transmit Timestamp Modes:
	off
	on
Hardware Receive Filter Modes:
	none
	all

root@...log:~# sudo phc2sys -s eth1 -c CLOCK_REALTIME -O 0 -m
phc2sys[140.318]: CLOCK_REALTIME phc offset    109350 s0 freq      +0 delay      0
phc2sys[141.319]: CLOCK_REALTIME phc offset    124742 s1 freq  +15385 delay      0
phc2sys[142.319]: CLOCK_REALTIME phc offset      -159 s2 freq  +15226 delay      0
phc2sys[143.319]: CLOCK_REALTIME phc offset        55 s2 freq  +15392 delay      0
phc2sys[144.320]: CLOCK_REALTIME phc offset      -101 s2 freq  +15252 delay      0
phc2sys[145.320]: CLOCK_REALTIME phc offset       -82 s2 freq  +15241 delay      0

root@...log:~# ptp4l -m -f /etc/ptp_slave.conf
ptp4l[1188.692]: port 1: new foreign master 00800f.fffe.950400-1
ptp4l[1192.329]: selected best master clock 00800f.fffe.950400
ptp4l[1192.329]: foreign master not using PTP timescale
ptp4l[1192.329]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE
ptp4l[1194.129]: master offset   29379149 s0 freq -297035 path delay   -810558
ptp4l[1195.929]: master offset   32040450 s1 freq +512000 path delay   -810558
ptp4l[1198.058]: master offset    1608389 s2 freq +512000 path delay   -810558
ptp4l[1198.058]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
ptp4l[1199.529]: clockcheck: clock jumped forward or running faster than expected!
ptp4l[1199.529]: master offset    2419241 s0 freq +512000 path delay   -810558
ptp4l[1199.529]: port 1: SLAVE to UNCALIBRATED on SYNCHRONIZATION_FAULT
ptp4l[1201.329]: master offset    2004645 s0 freq +512000 path delay   -810558
ptp4l[1203.130]: master offset    1618970 s1 freq +319234 path delay   -810558
ptp4l[1204.930]: master offset   -1098742 s2 freq -230137 path delay   -810558
ptp4l[1204.930]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
ptp4l[1206.730]: master offset   -1689657 s2 freq -512000 path delay   -810558
ptp4l[1208.530]: master offset   -1692389 s2 freq -512000 path delay   -345770
ptp4l[1210.330]: master offset    -404021 s2 freq  -47588 path delay   -166813
ptp4l[1212.130]: master offset    1098174 s2 freq +512000 path delay   -104916
ptp4l[1214.061]: master offset    1579741 s2 freq +512000 path delay    -60321
ptp4l[1215.730]: master offset    1180121 s2 freq +512000 path delay    -60321
ptp4l[1217.531]: master offset    -345392 s2 freq  -78876 path delay    -43020

Above ptp4l run was not the best as I do not have access (to my knowledge)
to an accurate PTP grandmaster. Foreign master here is just my laptop
(with only SW timestamping capabilities) with the
ptp4l service runnning and NTP disabled.

Alexandru Tachici (3):
  net: ethernet: adi: adin1110: add PTP clock support
  net: ethernet: adi: adin1110: add timestamping support
  dt-bindings: net: adin1110: Document ts-capt pin

Changelog v1 -> v2:
  - added phylib locking when writing to the integrated PHY registers in
  adin2111_enable_ts_timer()  and adin2111_enable_extts()
  - instead of ktime_get_fast_timestamps() used ktime_get_mono_fast_ns() and
  ktime_get_real_fast_ns() as I only need the real and mono part. The device
  part is added from the MAC-PHY.
  - in adjfine() use the new adjust_by_scaled_ppm() helper instead of writing
  the implementation

Alexandru Tachici (3):
  net: ethernet: adi: adin1110: add PTP clock support
  net: ethernet: adi: adin1110: add timestamping support
  dt-bindings: net: adin1110: Document ts-capt pin

 .../devicetree/bindings/net/adi,adin1110.yaml |   7 +
 drivers/net/ethernet/adi/adin1110.c           | 824 +++++++++++++++++-
 2 files changed, 821 insertions(+), 10 deletions(-)

-- 
2.34.1

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