[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <f22614b4-80ae-8b16-b53e-e43c44722668@starfivetech.com>
Date: Fri, 3 Feb 2023 11:14:56 +0800
From: yanhong wang <yanhong.wang@...rfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<linux-riscv@...ts.infradead.org>, <netdev@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: "David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
Richard Cochran <richardcochran@...il.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Peter Geis <pgwipeout@...il.com>
Subject: Re: [PATCH v4 6/7] riscv: dts: starfive: jh7110: Add ethernet device
node
On 2023/1/18 23:51, Krzysztof Kozlowski wrote:
> On 18/01/2023 07:17, Yanhong Wang wrote:
>> Add JH7110 ethernet device node to support gmac driver for the JH7110
>> RISC-V SoC.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@...rfivetech.com>
>> ---
>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 93 ++++++++++++++++++++++++
>> 1 file changed, 93 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index c22e8f1d2640..c6de6e3b1a25 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -433,5 +433,98 @@
>> reg-shift = <2>;
>> status = "disabled";
>> };
>> +
>> + stmmac_axi_setup: stmmac-axi-config {
>
> Why your bindings example is different?
>
There are two gmacs on the StarFive VF2 board, and the two
gmacs use the same configuration on axi, so the
stmmac_axi_setup is independent, which is different
from the bindings example.
> Were the bindings tested? Ahh, no they were not... Can you send only
> tested patches?
>
> Was this tested?
>
Yes, the bindings have been tested on the StarFive VF2 board and work normally.
>> + snps,lpi_en;
>> + snps,wr_osr_lmt = <4>;
>> + snps,rd_osr_lmt = <4>;
>> + snps,blen = <256 128 64 32 0 0 0>;
>> + };
>> +
>
> Best regards,
> Krzysztof
>
Powered by blists - more mailing lists