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Message-ID: <PH0PR18MB447495D929744FB8553308E0DED89@PH0PR18MB4474.namprd18.prod.outlook.com>
Date: Wed, 8 Feb 2023 17:04:29 +0000
From: Hariprasad Kelam <hkelam@...vell.com>
To: Paolo Abeni <pabeni@...hat.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: "kuba@...nel.org" <kuba@...nel.org>,
"davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>,
Sunil Kovvuri Goutham <sgoutham@...vell.com>,
Linu Cherian <lcherian@...vell.com>,
Geethasowjanya Akula <gakula@...vell.com>,
Jerin Jacob Kollanukkaran <jerinj@...vell.com>,
Subbaraya Sundeep Bhatta <sbhatta@...vell.com>,
"jhs@...atatu.com" <jhs@...atatu.com>,
"xiyou.wangcong@...il.com" <xiyou.wangcong@...il.com>,
"jiri@...nulli.us" <jiri@...nulli.us>,
"saeedm@...dia.com" <saeedm@...dia.com>,
"richardcochran@...il.com" <richardcochran@...il.com>,
"tariqt@...dia.com" <tariqt@...dia.com>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
"maxtram95@...il.com" <maxtram95@...il.com>,
Naveen Mamindlapalli <naveenm@...vell.com>,
"hariprasad.netdev@...il.com" <hariprasad.netdev@...il.com>
Subject: RE: [EXT] Re: [net-next PATCH V3 2/4] octeontx2-pf: qos send queues
management
will address the review comments in the next version.
Thanks,
Hariprasad k
> On Mon, 2023-02-06 at 11:16 +0530, Hariprasad Kelam wrote:
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > index 8a41ad8ca04f..f3ad4491ffb8 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
> > @@ -758,11 +758,16 @@ int otx2_txschq_stop(struct otx2_nic *pfvf)
> > void otx2_sqb_flush(struct otx2_nic *pfvf) {
> > int qidx, sqe_tail, sqe_head;
> > + struct otx2_snd_queue *sq;
> > u64 incr, *ptr, val;
> > int timeout = 1000;
> >
> > ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);
> > - for (qidx = 0; qidx < pfvf->hw.tot_tx_queues; qidx++) {
> > + for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf);
> > + qidx++) {
>
> The above can and should fit a single line.
>
> > @@ -189,7 +190,8 @@ struct otx2_hw {
> > u16 rx_queues;
> > u16 tx_queues;
> > u16 xdp_queues;
> > - u16 tot_tx_queues;
> > + u16 tc_tx_queues;
> > + u16 non_qos_queues; //tx_queues and xdp_tx_queues
>
> Please, avoid c++ style comments. Use plain /* */ instead.
>
> > u16 max_queues;
> > u16 pool_cnt;
> > u16 rqpool_cnt;
>
> [...]
>
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c
> > b/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c
> > new file mode 100644
> > index 000000000000..13a8cc53eb19
>
> [...]
>
> > +static void otx2_qos_sq_free_sqbs(struct otx2_nic *pfvf, int qidx) {
> > + struct otx2_qset *qset = &pfvf->qset;
> > + struct otx2_hw *hw = &pfvf->hw;
> > + struct otx2_snd_queue *sq;
> > + u64 iova, pa;
> > + int sqb;
> > +
> > + sq = &qset->sq[qidx];
> > + if (!sq->sqb_ptrs)
> > + return;
> > + for (sqb = 0; sqb < sq->sqb_count; sqb++) {
> > + if (!sq->sqb_ptrs[sqb])
> > + continue;
> > + iova = sq->sqb_ptrs[sqb];
> > + pa = otx2_iova_to_phys(pfvf->iommu_domain, iova);
> > + dma_unmap_page_attrs(pfvf->dev, iova, hw->sqb_size,
> > + DMA_FROM_DEVICE,
> > + DMA_ATTR_SKIP_CPU_SYNC);
> > + put_page(virt_to_page(phys_to_virt(pa)));
> > + }
> > +
> > + sq->sqb_count = 0;
> > +
> > + sq = &qset->sq[qidx];
> > + qmem_free(pfvf->dev, sq->sqe);
> > + qmem_free(pfvf->dev, sq->tso_hdrs);
> > + kfree(sq->sg);
> > + kfree(sq->sqb_ptrs);
> > + qmem_free(pfvf->dev, sq->timestamps);
> > +
> > + memset((void *)sq, 0, sizeof(*sq));
> > +}
> > +
> > +/* send queue id */
> > +static void otx2_qos_sqb_flush(struct otx2_nic *pfvf, int qidx) {
> > + int sqe_tail, sqe_head;
> > + u64 incr, *ptr, val;
> > +
> > + ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);
>
> This introduces a sparse warning:
>
> drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c:164:16: warning: cast
> removes address space '__iomem' of expression
>
> ...
>
> > + incr = (u64)qidx << 32;
> > + val = otx2_atomic64_add(incr, ptr);
>
> ... which means the above is likely broken on some arches.
>
> Thanks,
>
> Paolo
>
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