netdev - [PATCH v1] net: phy: adin: Add flags to disable enhanced link detection

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Message-Id: <20230228144056.2246114-1-ken.s@variscite.com>
Date:   Tue, 28 Feb 2023 09:40:56 -0500
From:   Ken Sloat <ken.s@...iscite.com>
To:     unlisted-recipients:; (no To-header on input)
Cc:     Ken Sloat <ken.s@...iscite.com>,
        Michael Hennerich <michael.hennerich@...log.com>,
        Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v1] net: phy: adin: Add flags to disable enhanced link detection

Enhanced link detection is an ADI PHY feature that allows for earlier
detection of link down if certain signal conditions are met. This
feature is for the most part enabled by default on the PHY. This is
not suitable for all applications and breaks the IEEE standard as
explained in the ADI datasheet.

To fix this, add override flags to disable enhanced link detection
for 1000BASE-T and 100BASE-TX respectively by clearing any related
feature enable bits.

This new feature was tested on an ADIN1300 but according to the
datasheet applies equally for 100BASE-TX on the ADIN1200.

Signed-off-by: Ken Sloat <ken.s@...iscite.com>
---
 drivers/net/phy/adin.c | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
index da65215d19bb..8809f3e036a4 100644
--- a/drivers/net/phy/adin.c
+++ b/drivers/net/phy/adin.c
@@ -69,6 +69,15 @@
 #define ADIN1300_EEE_CAP_REG			0x8000
 #define ADIN1300_EEE_ADV_REG			0x8001
 #define ADIN1300_EEE_LPABLE_REG			0x8002
+#define ADIN1300_FLD_EN_REG				0x8E27
+#define   ADIN1300_FLD_PCS_ERR_100_EN			BIT(7)
+#define   ADIN1300_FLD_PCS_ERR_1000_EN			BIT(6)
+#define   ADIN1300_FLD_SLCR_OUT_STUCK_100_EN	BIT(5)
+#define   ADIN1300_FLD_SLCR_OUT_STUCK_1000_EN	BIT(4)
+#define   ADIN1300_FLD_SLCR_IN_ZDET_100_EN		BIT(3)
+#define   ADIN1300_FLD_SLCR_IN_ZDET_1000_EN		BIT(2)
+#define   ADIN1300_FLD_SLCR_IN_INVLD_100_EN		BIT(1)
+#define   ADIN1300_FLD_SLCR_IN_INVLD_1000_EN	BIT(0)
 #define ADIN1300_CLOCK_STOP_REG			0x9400
 #define ADIN1300_LPI_WAKE_ERR_CNT_REG		0xa000
 
@@ -508,6 +517,31 @@ static int adin_config_clk_out(struct phy_device *phydev)
 			      ADIN1300_GE_CLK_CFG_MASK, sel);
 }
 
+static int adin_config_fld_en(struct phy_device *phydev)
+{
+	struct device *dev = &phydev->mdio.dev;
+	int reg;
+
+	reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_FLD_EN_REG);
+	if (reg < 0)
+		return reg;
+
+	if (device_property_read_bool(dev, "adi,disable-fld-1000base-t"))
+		reg &= ~(ADIN1300_FLD_PCS_ERR_1000_EN |
+				 ADIN1300_FLD_SLCR_OUT_STUCK_1000_EN |
+				 ADIN1300_FLD_SLCR_IN_ZDET_1000_EN |
+				 ADIN1300_FLD_SLCR_IN_INVLD_1000_EN);
+
+	if (device_property_read_bool(dev, "adi,disable-fld-100base-tx"))
+		reg &= ~(ADIN1300_FLD_PCS_ERR_100_EN |
+				 ADIN1300_FLD_SLCR_OUT_STUCK_100_EN |
+				 ADIN1300_FLD_SLCR_IN_ZDET_100_EN |
+				 ADIN1300_FLD_SLCR_IN_INVLD_100_EN);
+
+	return phy_write_mmd(phydev, MDIO_MMD_VEND1,
+			     ADIN1300_FLD_EN_REG, reg);
+}
+
 static int adin_config_init(struct phy_device *phydev)
 {
 	int rc;
@@ -534,6 +568,10 @@ static int adin_config_init(struct phy_device *phydev)
 	if (rc < 0)
 		return rc;
 
+	rc = adin_config_fld_en(phydev);
+	if (rc < 0)
+		return rc;
+
 	phydev_dbg(phydev, "PHY is using mode '%s'\n",
 		   phy_modes(phydev->interface));
 
-- 
2.34.1