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Message-ID: <20230302113752.057a3213@kmaincent-XPS-13-7390>
Date:   Thu, 2 Mar 2023 11:37:52 +0100
From:   Köry Maincent <kory.maincent@...tlin.com>
To:     linux@...linux.org.uk
Cc:     andrew@...n.ch, davem@...emloft.net, f.fainelli@...il.com,
        hkallweit1@...il.com, kuba@...nel.org, netdev@...r.kernel.org,
        richardcochran@...il.com,
        Maxime Chevallier <maxime.chevallier@...tlin.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH RFC net-next] net: phy: add Marvell PHY PTP support

Hello Russell,

> I have the situation on a couple of devices where there are multiple
> places that can do PTP timestamping:
> 
> - the PHY (slow to access, only event capture which may not be wired,
>    doesn't seem to synchronise well - delay of 58000, frequency changes
>    every second between +/-1500ppb.)
> - the Ethernet MAC (fast to access, supports event capture and trigger
>    generation which also may not be wired, synchronises well, delay of
>    700, frequency changes every second +/- 40ppb.)

Does this test have been made with the marvell 88E151x PHY?
On my side with a zynqMP SOM (cadence MACB MAC) the synchronization of the PHY
PTP clock is way better: +/-50ppb. Do you have an idea about the difference? 
Which link partner were you using? stm32mp157 hardware PTP on my side.

On the thread mail we are talking about PTP rate scale but as we can see you
and I have really not the same synchronisation on this PHY PTP. How
could we set a PTP rate scale in the driver if on two different board the
result vary a lot? Although I don't understand why.

I have also differences with the PTP MAC but it is expected as it is not the
same MAC.

Regards,
Köry

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