netdev - Re: [PATCH v2] ptp: add ToD device driver for Intel FPGA cards

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Message-ID: <ZBsVWWe33FJgoj9A@smile.fi.intel.com>
Date:   Wed, 22 Mar 2023 16:48:57 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Tianfei Zhang <tianfei.zhang@...el.com>
Cc:     richardcochran@...il.com, netdev@...r.kernel.org,
        linux-fpga@...r.kernel.org, ilpo.jarvinen@...ux.intel.com,
        vinicius.gomes@...el.com, pierre-louis.bossart@...ux.intel.com,
        marpagan@...hat.com, russell.h.weight@...el.com,
        matthew.gerlach@...ux.intel.com, nico@...xnic.net,
        Raghavendra Khadatare <raghavendrax.anand.khadatare@...el.com>
Subject: Re: [PATCH v2] ptp: add ToD device driver for Intel FPGA cards

On Wed, Mar 22, 2023 at 10:35:47AM -0400, Tianfei Zhang wrote:
> Adding a DFL (Device Feature List) device driver of ToD device for
> Intel FPGA cards.
> 
> The Intel FPGA Time of Day(ToD) IP within the FPGA DFL bus is exposed
> as PTP Hardware clock(PHC) device to the Linux PTP stack to synchronize
> the system clock to its ToD information using phc2sys utility of the
> Linux PTP stack. The DFL is a hardware List within FPGA, which defines
> a linked list of feature headers within the device MMIO space to provide
> an extensible way of adding subdevice features.

...

> +	dt->ptp_clock = ptp_clock_register(&dt->ptp_clock_ops, dev);
> +	if (IS_ERR_OR_NULL(dt->ptp_clock))
> +		return dev_err_probe(dt->dev, PTR_ERR_OR_ZERO(dt->ptp_clock),
> +				     "Unable to register PTP clock\n");
> +
> +	return 0;

Can be as simple as:

	ret = PTR_ERR_OR_ZERO(dt->ptp_clock);
	return dev_err_probe(dt->dev, ret, "Unable to register PTP clock\n");

-- 
With Best Regards,
Andy Shevchenko