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Message-ID: <BYAPR21MB1688C99BC6C86DEAC22C35D1D7849@BYAPR21MB1688.namprd21.prod.outlook.com>
Date: Fri, 24 Mar 2023 15:13:02 +0000
From: "Michael Kelley (LINUX)" <mikelley@...rosoft.com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>
CC: "hpa@...or.com" <hpa@...or.com>, KY Srinivasan <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
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Subject: RE: [PATCH v6 12/13] PCI: hv: Add hypercalls to read/write MMIO space
From: Lorenzo Pieralisi <lpieralisi@...nel.org> Sent: Friday, March 24, 2023 7:48 AM
>
> On Wed, Mar 08, 2023 at 06:40:13PM -0800, Michael Kelley wrote:
> > To support PCI pass-thru devices in Confidential VMs, Hyper-V
> > has added hypercalls to read and write MMIO space. Add the
> > appropriate definitions to hyperv-tlfs.h and implement
> > functions to make the hypercalls.
> >
> > Co-developed-by: Dexuan Cui <decui@...rosoft.com>
> > Signed-off-by: Dexuan Cui <decui@...rosoft.com>
> > Signed-off-by: Michael Kelley <mikelley@...rosoft.com>
> > Reviewed-by: Haiyang Zhang <haiyangz@...rosoft.com>
> > ---
> > arch/x86/include/asm/hyperv-tlfs.h | 3 ++
> > drivers/pci/controller/pci-hyperv.c | 64
> +++++++++++++++++++++++++++++++++++++
> > include/asm-generic/hyperv-tlfs.h | 22 +++++++++++++
> > 3 files changed, 89 insertions(+)
>
> Nit: I'd squash this in with the patch where the calls are used,
> don't think this patch is bisectable as it stands (maybe you
> split them for review purposes, apologies if so).
>
> Lorenzo
I did split the new code into two patches to make it more
consumable from a review standpoint. But I'm not understanding
what you mean by not being bisectable. After applying the first
of the two patches, everything should still compile and work
even though there are no users of the new hypercalls. Or maybe
your concern is that there would be "unused function" warnings?
In any case, squashing the two patches isn't a problem.
Michael
>
> > diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h
> > index 0b73a80..b4fb75b 100644
> > --- a/arch/x86/include/asm/hyperv-tlfs.h
> > +++ b/arch/x86/include/asm/hyperv-tlfs.h
> > @@ -122,6 +122,9 @@
> > /* Recommend using enlightened VMCS */
> > #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED BIT(14)
> >
> > +/* Use hypercalls for MMIO config space access */
> > +#define HV_X64_USE_MMIO_HYPERCALLS BIT(21)
> > +
> > /*
> > * CPU management features identification.
> > * These are HYPERV_CPUID_CPU_MANAGEMENT_FEATURES.EAX bits.
> > diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
> > index f33370b..d78a419 100644
> > --- a/drivers/pci/controller/pci-hyperv.c
> > +++ b/drivers/pci/controller/pci-hyperv.c
> > @@ -1041,6 +1041,70 @@ static int wslot_to_devfn(u32 wslot)
> > return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
> > }
> >
> > +static void hv_pci_read_mmio(struct device *dev, phys_addr_t gpa, int size, u32 *val)
> > +{
> > + struct hv_mmio_read_input *in;
> > + struct hv_mmio_read_output *out;
> > + u64 ret;
> > +
> > + /*
> > + * Must be called with interrupts disabled so it is safe
> > + * to use the per-cpu input argument page. Use it for
> > + * both input and output.
> > + */
> > + in = *this_cpu_ptr(hyperv_pcpu_input_arg);
> > + out = *this_cpu_ptr(hyperv_pcpu_input_arg) + sizeof(*in);
> > + in->gpa = gpa;
> > + in->size = size;
> > +
> > + ret = hv_do_hypercall(HVCALL_MMIO_READ, in, out);
> > + if (hv_result_success(ret)) {
> > + switch (size) {
> > + case 1:
> > + *val = *(u8 *)(out->data);
> > + break;
> > + case 2:
> > + *val = *(u16 *)(out->data);
> > + break;
> > + default:
> > + *val = *(u32 *)(out->data);
> > + break;
> > + }
> > + } else
> > + dev_err(dev, "MMIO read hypercall error %llx addr %llx size %d\n",
> > + ret, gpa, size);
> > +}
> > +
> > +static void hv_pci_write_mmio(struct device *dev, phys_addr_t gpa, int size, u32 val)
> > +{
> > + struct hv_mmio_write_input *in;
> > + u64 ret;
> > +
> > + /*
> > + * Must be called with interrupts disabled so it is safe
> > + * to use the per-cpu input argument memory.
> > + */
> > + in = *this_cpu_ptr(hyperv_pcpu_input_arg);
> > + in->gpa = gpa;
> > + in->size = size;
> > + switch (size) {
> > + case 1:
> > + *(u8 *)(in->data) = val;
> > + break;
> > + case 2:
> > + *(u16 *)(in->data) = val;
> > + break;
> > + default:
> > + *(u32 *)(in->data) = val;
> > + break;
> > + }
> > +
> > + ret = hv_do_hypercall(HVCALL_MMIO_WRITE, in, NULL);
> > + if (!hv_result_success(ret))
> > + dev_err(dev, "MMIO write hypercall error %llx addr %llx size %d\n",
> > + ret, gpa, size);
> > +}
> > +
> > /*
> > * PCI Configuration Space for these root PCI buses is implemented as a pair
> > * of pages in memory-mapped I/O space. Writing to the first page chooses
> > diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hyperv-tlfs.h
> > index b870983..ea406e9 100644
> > --- a/include/asm-generic/hyperv-tlfs.h
> > +++ b/include/asm-generic/hyperv-tlfs.h
> > @@ -168,6 +168,8 @@ struct ms_hyperv_tsc_page {
> > #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
> > #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
> > #define HVCALL_MODIFY_SPARSE_GPA_PAGE_HOST_VISIBILITY 0x00db
> > +#define HVCALL_MMIO_READ 0x0106
> > +#define HVCALL_MMIO_WRITE 0x0107
> >
> > /* Extended hypercalls */
> > #define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001
> > @@ -796,4 +798,24 @@ struct hv_memory_hint {
> > union hv_gpa_page_range ranges[];
> > } __packed;
> >
> > +/* Data structures for HVCALL_MMIO_READ and HVCALL_MMIO_WRITE */
> > +#define HV_HYPERCALL_MMIO_MAX_DATA_LENGTH 64
> > +
> > +struct hv_mmio_read_input {
> > + u64 gpa;
> > + u32 size;
> > + u32 reserved;
> > +} __packed;
> > +
> > +struct hv_mmio_read_output {
> > + u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
> > +} __packed;
> > +
> > +struct hv_mmio_write_input {
> > + u64 gpa;
> > + u32 size;
> > + u32 reserved;
> > + u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
> > +} __packed;
> > +
> > #endif
> > --
> > 1.8.3.1
> >
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