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Message-ID: <87jzz2o7hu.fsf@nvidia.com>
Date:   Mon, 27 Mar 2023 11:35:24 +0200
From:   Petr Machata <petrm@...dia.com>
To:     Simon Horman <simon.horman@...igine.com>
CC:     Petr Machata <petrm@...dia.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        "Paolo Abeni" <pabeni@...hat.com>, <netdev@...r.kernel.org>,
        Ido Schimmel <idosch@...dia.com>,
        Amit Cohen <amcohen@...dia.com>, <mlxsw@...dia.com>
Subject: Re: [PATCH net-next 2/6] mlxsw: reg: Add Management Capabilities
 Mask Register


Simon Horman <simon.horman@...igine.com> writes:

> On Wed, Mar 22, 2023 at 05:49:31PM +0100, Petr Machata wrote:
>> From: Amit Cohen <amcohen@...dia.com>
>> 
>> MCAM register reports the device supported management features. Querying
>> this register exposes if features are supported with the current firmware
>> version in the current ASIC. Then, the drive can separate between different
>> implementations dynamically.
>> 
>> MCAM register supports querying whether a new reset flow (which includes
>> PCI reset) is supported or not. Add support for the register as preparation
>> for support of the new reset flow.
>> 
>> Note that the access to the bits in the field 'mng_feature_cap_mask' is
>> not same to other mask fields in other registers. In most of the cases
>> bit #0 is the first one in the last dword, in MCAM register, bits #0-#31
>> are in the first dword and so on. Declare the mask field using bits arrays
>> per dword to simplify the access.
>> 
>> Signed-off-by: Amit Cohen <amcohen@...dia.com>
>> Reviewed-by: Petr Machata <petrm@...dia.com>
>> Signed-off-by: Petr Machata <petrm@...dia.com>
>
> I'm fine with this patch, and offered a Reviewed-by tag in another email.
> But when sending that I forgot the minor nit below.
> Please regard it as informational only.
>
>> ---
>>  drivers/net/ethernet/mellanox/mlxsw/reg.h | 74 +++++++++++++++++++++++
>>  1 file changed, 74 insertions(+)
>> 
>> diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
>> index 0d7d5e28945a..c4446085ebc5 100644
>> --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
>> +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
>
> ...
>
>> +static inline void
>> +mlxsw_reg_mcam_unpack(char *payload,
>> +		      enum mlxsw_reg_mcam_mng_feature_cap_mask_bits bit,
>> +		      bool *p_mng_feature_cap_val)
>> +{
>> +	int offset = bit % (MLXSW_REG_BYTES_PER_DWORD * BITS_PER_BYTE);
>> +	int dword = bit / (MLXSW_REG_BYTES_PER_DWORD * BITS_PER_BYTE);
>
> nit: checkpatch seems mildly upset that there is no blank line here.

Yes, thanks for pointing this out. I saw that, too. The complaint is
that there should be a blank line after the declaration block, but the
next line is still a part of the declaration block.

>> +	u8 (*getters[])(const char *, u16) = {
>> +		mlxsw_reg_mcam_mng_feature_cap_mask_dw0_get,
>> +		mlxsw_reg_mcam_mng_feature_cap_mask_dw1_get,
>> +		mlxsw_reg_mcam_mng_feature_cap_mask_dw2_get,
>> +		mlxsw_reg_mcam_mng_feature_cap_mask_dw3_get,
>> +	};

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