netdev - Re: [PATCH v3] ptp: add ToD device driver for Intel FPGA cards

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Date:   Tue, 28 Mar 2023 19:34:58 -0700
From:   Richard Cochran <richardcochran@...il.com>
To:     Tianfei Zhang <tianfei.zhang@...el.com>
Cc:     netdev@...r.kernel.org, linux-fpga@...r.kernel.org,
        ilpo.jarvinen@...ux.intel.com, andriy.shevchenko@...ux.intel.com,
        vinicius.gomes@...el.com, pierre-louis.bossart@...ux.intel.com,
        marpagan@...hat.com, russell.h.weight@...el.com,
        matthew.gerlach@...ux.intel.com, nico@...xnic.net,
        Raghavendra Khadatare <raghavendrax.anand.khadatare@...el.com>
Subject: Re: [PATCH v3] ptp: add ToD device driver for Intel FPGA cards

On Tue, Mar 28, 2023 at 10:24:55AM -0400, Tianfei Zhang wrote:
> Adding a DFL (Device Feature List) device driver of ToD device for
> Intel FPGA cards.
> 
> The Intel FPGA Time of Day(ToD) IP within the FPGA DFL bus is exposed
> as PTP Hardware clock(PHC) device to the Linux PTP stack to synchronize
> the system clock to its ToD information using phc2sys utility of the
> Linux PTP stack. The DFL is a hardware List within FPGA, which defines
> a linked list of feature headers within the device MMIO space to provide
> an extensible way of adding subdevice features.
> 
> Signed-off-by: Raghavendra Khadatare <raghavendrax.anand.khadatare@...el.com>
> Signed-off-by: Tianfei Zhang <tianfei.zhang@...el.com>

Acked-by: Richard Cochran <richardcochran@...il.com>