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Message-ID: <5defb636-1f0f-6a6c-3c10-e8960b7d4399@gmail.com>
Date:   Fri, 31 Mar 2023 12:53:57 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Lorenzo Bianconi <lorenzo@...nel.org>, netdev@...r.kernel.org
Cc:     davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
        pabeni@...hat.com, linux-mediatek@...ts.infradead.org,
        nbd@....name, john@...ozen.org, sean.wang@...iatek.com,
        Mark-MC.Lee@...iatek.com, lorenzo.bianconi@...hat.com,
        daniel@...rotopia.org, krzysztof.kozlowski+dt@...aro.org,
        robh+dt@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH net-next 04/10] arm64: dts: mt7986: move cpuboot in a
 dedicated node



On 20/03/2023 17:57, Lorenzo Bianconi wrote:
> Since the cpuboot memory region is not part of the RAM SoC, move cpuboot
> in a deidicated syscon node.
> This patch helps to keep backward-compatibility with older version of
> uboot codebase where we have a limit of 8 reserved-memory dts child
> nodes.
> 
> Signed-off-by: Lorenzo Bianconi <lorenzo@...nel.org>

Acked-by: Matthias Brugger <matthias.bgg@...il.com>

> ---
>   arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 21 +++++++++++----------
>   1 file changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index 51944690e790..668b6cfa6a3d 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -113,12 +113,6 @@ wo_dlm1: wo-dlm@...f8000 {
>   			reg = <0 0x151f8000 0 0x2000>;
>   			no-map;
>   		};
> -
> -		wo_boot: wo-boot@...94000 {
> -			reg = <0 0x15194000 0 0x1000>;
> -			no-map;
> -		};
> -
>   	};
>   
>   	timer {
> @@ -461,10 +455,11 @@ wed0: wed@...10000 {
>   			interrupt-parent = <&gic>;
>   			interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
>   			memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
> -					<&wo_data>, <&wo_boot>;
> +					<&wo_data>;
>   			memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
> -					      "wo-data", "wo-boot";
> +					      "wo-data";
>   			mediatek,wo-ccif = <&wo_ccif0>;
> +			mediatek,wo-cpuboot = <&wo_cpuboot>;
>   		};
>   
>   		wed1: wed@...11000 {
> @@ -474,10 +469,11 @@ wed1: wed@...11000 {
>   			interrupt-parent = <&gic>;
>   			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
>   			memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
> -					<&wo_data>, <&wo_boot>;
> +					<&wo_data>;
>   			memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
> -					      "wo-data", "wo-boot";
> +					      "wo-data";
>   			mediatek,wo-ccif = <&wo_ccif1>;
> +			mediatek,wo-cpuboot = <&wo_cpuboot>;
>   		};
>   
>   		wo_ccif0: syscon@...a5000 {
> @@ -494,6 +490,11 @@ wo_ccif1: syscon@...ad000 {
>   			interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
>   		};
>   
> +		wo_cpuboot: syscon@...94000 {
> +			compatible = "mediatek,mt7986-wo-cpuboot", "syscon";
> +			reg = <0 0x15194000 0 0x1000>;
> +		};
> +
>   		eth: ethernet@...00000 {
>   			compatible = "mediatek,mt7986-eth";
>   			reg = <0 0x15100000 0 0x80000>;

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