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Message-ID: <ZCsuRDDAmIj571wl@corigine.com>
Date: Mon, 3 Apr 2023 21:51:32 +0200
From: Simon Horman <simon.horman@...igine.com>
To: Shenwei Wang <shenwei.wang@....com>
Cc: "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Wong Vee Khee <veekhee@...le.com>,
Kurt Kanzenbach <kurt@...utronix.de>,
Mohammad Athari Bin Ismail <mohammad.athari.ismail@...el.com>,
Andrey Konovalov <andrey.konovalov@...aro.org>,
Jochen Henneberg <jh@...neberg-systemdesign.com>,
Tan Tee Min <tee.min.tan@...ux.intel.com>,
netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com, imx@...ts.linux.dev
Subject: Re: [PATCH v5 2/2] net: stmmac: dwmac-imx: use platform specific
reset for imx93 SoCs
On Mon, Apr 03, 2023 at 10:24:08AM -0500, Shenwei Wang wrote:
> The patch addresses an issue with the reset logic on the i.MX93 SoC, which
> requires configuration of the correct interface speed under RMII mode to
> complete the reset. The patch implements a fix_soc_reset function and uses
> it specifically for the i.MX93 SoCs.
>
> Reviewed-by: Fabio Estevam <festevam@...il.com>
> Signed-off-by: Shenwei Wang <shenwei.wang@....com>
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-imx.c | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> index 2a2be65d65a0..465de3392e4e 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> @@ -37,10 +37,15 @@
> #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1)
> #define MX93_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0)
>
> +#define DMA_BUS_MODE 0x00001000
> +#define DMA_BUS_MODE_SFT_RESET (0x1 << 0)
> +#define RMII_RESET_SPEED (0x3 << 14)
> +
> struct imx_dwmac_ops {
> u32 addr_width;
> bool mac_rgmii_txclk_auto_adj;
>
> + int (*fix_soc_reset)(void *priv, void __iomem *ioaddr);
> int (*set_intf_mode)(struct plat_stmmacenet_data *plat_dat);
> };
>
> @@ -207,6 +212,25 @@ static void imx_dwmac_fix_speed(void *priv, unsigned int speed)
> dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> }
>
> +static int imx_dwmac_mx93_reset(void *priv, void __iomem *ioaddr)
> +{
> + u32 value = readl(ioaddr + DMA_BUS_MODE);
> + struct plat_stmmacenet_data *plat_dat = priv;
> +
nit: reverse xmas tree - longest line to shortest - for local variable
declarations.
...
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