lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <2912dd64-44f7-953b-b1c9-ff79222e9462@kernel.org> Date: Tue, 4 Apr 2023 14:38:06 +0300 From: Roger Quadros <rogerq@...nel.org> To: Siddharth Vadapalli <s-vadapalli@...com>, davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, linux@...linux.org.uk, pabeni@...hat.com Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, srk@...com Subject: Re: [PATCH net-next v3 2/3] net: ethernet: ti: am65-cpsw: Enable QSGMII for J784S4 CPSW9G On 04/04/2023 09:14, Siddharth Vadapalli wrote: > TI's J784S4 SoC supports QSGMII mode with the CPSW9G instance of the > CPSW Ethernet Switch. Add a new compatible for J784S4 SoC and enable > QSGMII support for it by adding QSGMII mode to the extra_modes member of > the "j784s4_cpswxg_pdata" SoC data. > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com> Reviewed-by: Roger Quadros <rogerq@...nel.org>
Powered by blists - more mailing lists