netdev - RE: [PATCH v5 2/9] wifi: rtw88: sdio: Add HCI implementation for SDIO based chipsets

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Message-ID: <0c9e1c2b3bc04abcb79de87610382d6a@realtek.com>
Date:   Thu, 6 Apr 2023 02:31:39 +0000
From:   Ping-Ke Shih <pkshih@...ltek.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        "linux-wireless@...r.kernel.org" <linux-wireless@...r.kernel.org>
CC:     Yan-Hsuan Chuang <tony0620emma@...il.com>,
        Kalle Valo <kvalo@...nel.org>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Chris Morgan <macromorgan@...mail.com>,
        "Nitin Gupta" <nitin.gupta981@...il.com>,
        Neo Jou <neojou@...il.com>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Larry Finger <Larry.Finger@...inger.net>,
        Pali Rohár <pali@...nel.org>,
        Simon Horman <simon.horman@...igine.com>
Subject: RE: [PATCH v5 2/9] wifi: rtw88: sdio: Add HCI implementation for SDIO based chipsets



> -----Original Message-----
> From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
> Sent: Thursday, April 6, 2023 4:07 AM
> To: linux-wireless@...r.kernel.org
> Cc: Yan-Hsuan Chuang <tony0620emma@...il.com>; Kalle Valo <kvalo@...nel.org>; Ulf Hansson
> <ulf.hansson@...aro.org>; linux-kernel@...r.kernel.org; netdev@...r.kernel.org;
> linux-mmc@...r.kernel.org; Chris Morgan <macromorgan@...mail.com>; Nitin Gupta <nitin.gupta981@...il.com>;
> Neo Jou <neojou@...il.com>; Ping-Ke Shih <pkshih@...ltek.com>; Jernej Skrabec <jernej.skrabec@...il.com>;
> Larry Finger <Larry.Finger@...inger.net>; Pali Rohár <pali@...nel.org>; Simon Horman
> <simon.horman@...igine.com>; Martin Blumenstingl <martin.blumenstingl@...glemail.com>
> Subject: [PATCH v5 2/9] wifi: rtw88: sdio: Add HCI implementation for SDIO based chipsets
> 
> Add a sub-driver for SDIO based chipsets which implements the following
> functionality:
> - register accessors for 8, 16 and 32 bits for all states of the card
>   (including usage of 4x 8 bit access for one 32 bit buffer if the card
>   is not fully powered on yet - or if it's fully powered on then 1x 32
>   bit access is used)
> - checking whether there's space in the TX FIFO queue to transmit data
> - transfers from the host to the device for actual network traffic,
>   reserved pages (for firmware download) and H2C (host-to-card)
>   transfers
> - receiving data from the device
> - deep power saving state
> 
> The transmit path is optimized so DMA-capable SDIO host controllers can
> directly use the buffers provided because the buffer's physical
> addresses are 8 byte aligned.
> 
> The receive path is prepared to support RX aggregation where the
> chipset combines multiple MAC frames into one bigger buffer to reduce
> SDIO transfer overhead.
> 
> Co-developed-by: Jernej Skrabec <jernej.skrabec@...il.com>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@...il.com>
> Reviewed-by: Ulf Hansson <ulf.hansson@...aro.org>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>

Reviewed-by: Ping-Ke Shih <pkshih@...ltek.com>