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Date:   Fri,  7 Apr 2023 17:18:39 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Gregory Clement <gregory.clement@...tlin.com>
Cc:     Russell King <rmk+kernel@...linux.org.uk>,
        Vladimir Oltean <vladimir.oltean@....com>,
        arm-soc <arm@...nel.org>, netdev <netdev@...r.kernel.org>,
        Andrew Lunn <andrew@...n.ch>
Subject: [PATCH] ARM64: dts: marvell: cn9310: Add missing phy-mode

The DSA framework has got more picky about always having a phy-mode
for the CPU port. The SoC Ethernet is being configured to
10gbase-r. Set the switch phy-mode based on this. Additionally, the
SoC Ethernet is using in-band signalling to determine the link speed,
so add same parameter to the switch.

Additionally, the cpu label has never actually been used in the
binding, so remove it.

Signed-off-by: Andrew Lunn <andrew@...n.ch>
---
 arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 8e4ec243fb8f..32cfb3e2efc3 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -282,8 +282,9 @@ port@9 {
 
 			port@a {
 				reg = <10>;
-				label = "cpu";
 				ethernet = <&cp0_eth0>;
+				phy-mode = "10gbase-r";
+				managed = "in-band-status";
 			};
 
 		};
-- 
2.40.0

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