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Message-ID: <ZDQjEkTstngxib/0@lore-desk>
Date: Mon, 10 Apr 2023 16:54:10 +0200
From: Lorenzo Bianconi <lorenzo@...nel.org>
To: Rob Herring <robh@...nel.org>
Cc: netdev@...r.kernel.org, davem@...emloft.net, edumazet@...gle.com,
pabeni@...hat.com, kuba@...nel.org, matthias.bgg@...il.com,
linux-mediatek@...ts.infradead.org, nbd@....name, john@...ozen.org,
sean.wang@...iatek.com, Mark-MC.Lee@...iatek.com,
lorenzo.bianconi@...hat.com, daniel@...rotopia.org,
krzysztof.kozlowski+dt@...aro.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 net-next 00/10] mtk: wed: move cpuboot, ilm and dlm in
dedicated dts nodes
> On Fri, Mar 31, 2023 at 03:12:36PM +0200, Lorenzo Bianconi wrote:
> > Since cpuboot, ilm and dlm memory region are not part of MT7986 SoC RAM,
>
> That's not really a requirement. Is that the only "problem" here?
I would say this series allows to be closer to a standard binding and at the
same time helps with uboot compatibility.
>
> Certainly going from a standard binding to a custom phandle reference is
> not an improvement.
>
> > move them in dedicated mt7986a syscon dts nodes.
>
> What makes them a syscon? Are they memory or h/w registers? Can't be
> both...
>
> Perhaps mmio-sram?
ilm and dlm do not have h/w registers afaik, they are chip memory used
to store firmware information, syscon is just the closest binding I found.
I did not find mmio-sram, my fault.
Regards,
Lorenzo
>
> > At the same time we keep backward-compatibility with older dts version where
> > cpuboot, ilm and dlm were defined as reserved-memory child nodes.
>
> Doesn't really seem big enough issue to justify carrying this.
>
> Rob
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