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Message-ID: <20230411113516.ez5cm4262ttec2z7@skbuf>
Date: Tue, 11 Apr 2023 14:35:16 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Oleksij Rempel <o.rempel@...gutronix.de>,
Andrew Lunn <andrew@...n.ch>,
Woojung Huh <woojung.huh@...rochip.com>,
Arun Ramadoss <arun.ramadoss@...rochip.com>,
Florian Fainelli <f.fainelli@...il.com>,
netdev@...r.kernel.org, UNGLinuxDriver@...rochip.com,
Eric Dumazet <edumazet@...gle.com>, kernel@...gutronix.de,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
"David S. Miller" <davem@...emloft.net>
Subject: Re: FWD: Re: [PATCH net-next v1 1/1] net: dsa: microchip: ksz8: Make
flow control, speed, and duplex on CPU port configurable
On Tue, Apr 11, 2023 at 02:16:09PM +0300, Vladimir Oltean wrote:
> I may have missed something.
Maybe I'm wrong, but my blind intuition says that when autoneg is
disabled in the integrated PHYs, flow control _is_ by default forced off
per port, unless the "Force Flow Control" bit from Port N Control 2
registers is set. So that can be used to still support:
- ethtool --pause swp0 autoneg off rx on tx on
- ethtool --pause swp0 autoneg off rx off tx off
- ethtool --pause swp0 autoneg on # asymmetric RX/TX combinations depend upon autoneg
I may be wrong; I don't have the hardware and the ethtool pause autoneg
bit is not 100% clear to me.
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