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Message-ID: <ZDbNcDGIbJrm/x6L@x1>
Date:   Wed, 12 Apr 2023 11:25:36 -0400
From:   Brian Masney <bmasney@...hat.com>
To:     Andrew Halaney <ahalaney@...hat.com>
Cc:     linux-kernel@...r.kernel.org, agross@...nel.org,
        andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
        sboyd@...nel.org, richardcochran@...il.com,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, netdev@...r.kernel.org,
        echanude@...hat.com, ncai@...cinc.com, jsuraj@....qualcomm.com,
        hisunil@...cinc.com
Subject: Re: [PATCH v4 0/3] Add EMAC3 support for sa8540p-ride
 (devicetree/clk bits)

On Tue, Apr 11, 2023 at 03:20:06PM -0500, Andrew Halaney wrote:
> This is a forward port / upstream refactor of code delivered
> downstream by Qualcomm over at [0] to enable the DWMAC5 based
> implementation called EMAC3 on the sa8540p-ride dev board.
> 
> From what I can tell with the board schematic in hand,
> as well as the code delivered, the main changes needed are:
> 
>     1. A new address space layout for dwmac5/EMAC3 MTL/DMA regs
>     2. A new programming sequence required for the EMAC3 base platforms
> 
> This series addresses the devicetree and clock changes to support this
> hardware bringup.
> 
> As requested[1], it has been split up by compile deps / maintainer tree.
> The associated v4 of the netdev specific changes can be found at [2].
> Together, they result in the ethernet controller working for
> both controllers on this platform.

Looks good to me!

Tested-by: Brian Masney <bmasney@...hat.com>

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