netdev - Re: [PATCH net-next 2/2] net: phy: microchip_t1s: add support for Microchip LAN865x Rev.B0 PHYs

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Message-ID: <c831ce86-37e4-420e-bea0-73fdfdaf7913@lunn.ch>
Date:   Thu, 27 Apr 2023 00:02:20 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc:     netdev@...r.kernel.org, davem@...emloft.net,
        jan.huber@...rochip.com, thorsten.kummermehr@...rochip.com,
        ramon.nordin.rodriguez@...roamp.se
Subject: Re: [PATCH net-next 2/2] net: phy: microchip_t1s: add support for
 Microchip LAN865x Rev.B0 PHYs

> +	/* disable all the interrupts
> +	 */
> +	ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, LAN86XX_REG_IRQ_1_CTL, 0xFFFF);
> +	if (ret)
> +		return ret;
> +	return phy_write_mmd(phydev, MDIO_MMD_VEND2, LAN86XX_REG_IRQ_2_CTL, 0xFFFF);

This is also something which could be in a patch of its own, with an
explanation in the commit message. You said the device will generate
an interrupt after reset whatever. So it would be good to document
this odd behaviour. Also, should you actually clear the pending
interrupt, as well as disable interrupts? I assume there is an
interrupt status register? It would typically be clear on read, or
write 1 to clear a specific interrupt?

	Andrew