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Date:   Thu, 27 Apr 2023 02:26:07 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Hayes Wang <hayeswang@...ltek.com>
Cc:     kuba@...nel.org, davem@...emloft.net, netdev@...r.kernel.org,
        nic_swsd@...ltek.com, linux-kernel@...r.kernel.org,
        linux-usb@...r.kernel.org
Subject: Re: [PATCH net 2/3] r8152: fix the poor throughput for 2.5G devices

On Wed, Apr 26, 2023 at 08:28:04PM +0800, Hayes Wang wrote:
> Fix the poor throughput for 2.5G devices, when changing the speed from
> auto mode to force mode. This patch is used to notify the MAC when the
> mode is changed.
> 
> Fixes: 195aae321c82 ("r8152: support new chips")
> Signed-off-by: Hayes Wang <hayeswang@...ltek.com>
> ---
>  drivers/net/usb/r8152.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
> index 08d1786135f2..3ecd4651ae29 100644
> --- a/drivers/net/usb/r8152.c
> +++ b/drivers/net/usb/r8152.c
> @@ -7554,6 +7554,11 @@ static void r8156_hw_phy_cfg(struct r8152 *tp)
>  				      ((swap_a & 0x1f) << 8) |
>  				      ((swap_a >> 8) & 0x1f));
>  		}
> +
> +		/*  set intr_en[3] */
> +		data = ocp_reg_read(tp, 0xa424);
> +		data |= BIT(3);
> +		ocp_reg_write(tp, 0xa424, data);

Please add #define for 0xa424. And a #define for BIT(3), just to
document what bit 3 is. Once we understand what bit 3 is, we might
then understand why this change makes 2.5G perform better. At the
moment all i see is magic.

       Andrew

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