netdev - Re: [PATCH v5 3/3] pinctrl: qcom: Add SDX75 pincontrol driver

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Message-ID: <CAHp75Ve0FqX7=x3B5eaCfj0AE5m1qMXGrYzLoHzqbLY7gdOSOg@mail.gmail.com>
Date: Wed, 3 May 2023 12:47:37 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Rohit Agarwal <quic_rohiagar@...cinc.com>
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org, 
	linus.walleij@...aro.org, robh+dt@...nel.org, 
	krzysztof.kozlowski+dt@...aro.org, richardcochran@...il.com, 
	manivannan.sadhasivam@...aro.org, linux-arm-msm@...r.kernel.org, 
	linux-gpio@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH v5 3/3] pinctrl: qcom: Add SDX75 pincontrol driver

On Wed, May 3, 2023 at 8:39 AM Rohit Agarwal <quic_rohiagar@...cinc.com> wrote:
>
> Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
> with pinctrl framework for SDX75 SoC.
> While at it, reordering the SDX65 entry.

...

> +#define FUNCTION(n)                                                    \
> +       [msm_mux_##n] = {                                               \
> +                       .func = PINCTRL_PINFUNCTION(#n,                 \
> +                                       n##_groups,                     \
> +                                       ARRAY_SIZE(n##_groups))         \
> +                       }

Or even define

  #define MSM_PIN_FUNCTION(fname) \
      [msm_mux_##fname] = PINCTRL_PINFUNCTION(...)

in the header for all MSM related controllers.

All the same for the rest groups (if any), otherwise use redefinition
of FUNCTION inside each file.

-- 
With Best Regards,
Andy Shevchenko