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Message-ID: <e7671e05-3a42-4c73-b1f5-05ed83a60c18@lunn.ch>
Date: Thu, 11 May 2023 01:08:00 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Daniel Golle <daniel@...rotopia.org>
Cc: netdev@...r.kernel.org, linux-mediatek@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Qingfang Deng <dqfext@...il.com>,
	SkyLake Huang <SkyLake.Huang@...iatek.com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Subject: Re: [PATCH net-next v3] net: phy: add driver for MediaTek SoC
 built-in GE PHYs

> +static int mt7988_phy_probe_shared(struct phy_device *phydev)
> +{
> +	struct mtk_socphy_shared_priv *priv = phydev->shared->priv;
> +	void __iomem *boottrap;
> +	struct device_node *np;
> +	u32 reg;
> +
> +	np = of_find_compatible_node(NULL, NULL, "mediatek,boottrap");
> +	if (!np)
> +		return -ENOENT;

Is this documented somewhere in the DT binding document?

The rest of the driver just seems to be undocumented magic which
nobody except the vendor would understand.

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

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