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Message-ID: <f9e0da51-6c55-4768-aa27-437bb7f19888@lunn.ch> Date: Thu, 11 May 2023 14:38:51 +0200 From: Andrew Lunn <andrew@...n.ch> To: Jiawen Wu <jiawenwu@...stnetic.com> Cc: netdev@...r.kernel.org, jarkko.nikula@...ux.intel.com, andriy.shevchenko@...ux.intel.com, mika.westerberg@...ux.intel.com, jsd@...ihalf.com, Jose.Abreu@...opsys.com, hkallweit1@...il.com, linux@...linux.org.uk, linux-i2c@...r.kernel.org, linux-gpio@...r.kernel.org, mengyuanlou@...-swift.com Subject: Re: [PATCH net-next v7 6/9] net: txgbe: Support GPIO to SFP socket > +static int txgbe_gpio_set_type(struct irq_data *d, unsigned int type) > +{ > + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); > + irq_hw_number_t hwirq = irqd_to_hwirq(d); > + struct wx *wx = gpiochip_get_data(gc); > + u32 level, polarity; > + > + level = rd32(wx, WX_GPIO_INTTYPE_LEVEL); > + polarity = rd32(wx, WX_GPIO_POLARITY); > + > + switch (type) { > + case IRQ_TYPE_EDGE_BOTH: > + level |= BIT(hwirq); > + break; > + case IRQ_TYPE_EDGE_RISING: > + level |= BIT(hwirq); > + polarity |= BIT(hwirq); > + break; > + case IRQ_TYPE_EDGE_FALLING: > + level |= BIT(hwirq); > + polarity &= ~BIT(hwirq); > + break; > + case IRQ_TYPE_LEVEL_HIGH: > + level &= ~BIT(hwirq); > + polarity |= BIT(hwirq); > + break; > + case IRQ_TYPE_LEVEL_LOW: > + level &= ~BIT(hwirq); > + polarity &= ~BIT(hwirq); > + break; > + } You have two configuration bits, level and polarity, yet handle 5 different types? > + wr32m(wx, WX_GPIO_INTEN, BIT(hwirq), BIT(hwirq)); > + wr32(wx, WX_GPIO_INTTYPE_LEVEL, level); > + if (type != IRQ_TYPE_EDGE_BOTH) > + wr32(wx, WX_GPIO_POLARITY, polarity); If we are interested in both edges, then polarity is meaningless. So i can understand not writing it. But how does the hardware know polarity should not be used? Andrew
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