netdev - Re: [PATCH net-next v3 1/2] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable

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Date: Fri, 19 May 2023 12:21:14 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Oleksij Rempel <o.rempel@...gutronix.de>
Cc: "David S. Miller" <davem@...emloft.net>, Andrew Lunn <andrew@...n.ch>,
	Eric Dumazet <edumazet@...gle.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Woojung Huh <woojung.huh@...rochip.com>,
	Arun Ramadoss <arun.ramadoss@...rochip.com>,
	"Russell King (Oracle)" <linux@...linux.org.uk>,
	kernel@...gutronix.de, linux-kernel@...r.kernel.org,
	netdev@...r.kernel.org, UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net-next v3 1/2] net: dsa: microchip: ksz8: Make flow
 control, speed, and duplex on CPU port configurable

Hi Oleksij,

On Thu, May 18, 2023 at 11:29:12AM +0200, Oleksij Rempel wrote:
> +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
> +			      unsigned int mode, phy_interface_t interface,
> +			      struct phy_device *phydev, int speed, int duplex,
> +			      bool tx_pause, bool rx_pause)
> +{
> +	if (dsa_is_upstream_port(dev->ds, port))
> +		ksz8_upstream_link_up(dev, port, speed, duplex, tx_pause,
> +				     rx_pause);
> +}

Can we make phylink control independent of DSA switch tree topology please?
Whether the port goes towards the host or not has no saying in whether
it is an xMII port. DSA's phylink integration makes it possible to
connect the CPU port to the host SoC through a PHY + RJ45 cable, case in
which the xMII port could be used as a user port.