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Message-ID: <b55f2483-8d8b-4eae-b224-7852c1f0ecdd@lunn.ch>
Date: Thu, 25 May 2023 03:09:20 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
ramon.nordin.rodriguez@...roamp.se, horatiu.vultur@...rochip.com,
Woojung.Huh@...rochip.com, Nicolas.Ferre@...rochip.com,
Thorsten.Kummermehr@...rochip.com
Subject: Re: [PATCH net-next v3 4/6] net: phy: microchip_t1s: fix reset
complete status handling
On Wed, May 24, 2023 at 08:15:37PM +0530, Parthiban Veerasooran wrote:
> As per the datasheet DS-LAN8670-1-2-60001573C.pdf, the Reset Complete
> status bit in the STS2 register has to be checked before proceeding to
> the initial configuration. Reading STS2 register will also clear the
> Reset Complete interrupt which is non-maskable.
>
> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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