[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230524230530.ahnoz6cfedcz4pri@skbuf>
Date: Thu, 25 May 2023 02:05:30 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: David Epping <david.epping@...singlinkelectronics.com>
Cc: Andrew Lunn <andrew@...n.ch>, Russell King <linux@...linux.org.uk>,
Heiner Kallweit <hkallweit1@...il.com>,
"David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net v3 4/4] net: phy: mscc: enable VSC8501/2 RGMII RX
clock
On Tue, May 23, 2023 at 05:31:08PM +0200, David Epping wrote:
> By default the VSC8501 and VSC8502 RGMII/GMII/MII RX_CLK output is
> disabled. To allow packet forwarding towards the MAC it needs to be
> enabled.
>
> For other PHYs supported by this driver the clock output is enabled
> by default.
>
> Signed-off-by: David Epping <david.epping@...singlinkelectronics.com>
> ---
Fixes: d3169863310d ("net: phy: mscc: add support for VSC8502")
Reviewed-by: Vladimir Oltean <olteanv@...il.com>
Powered by blists - more mailing lists