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Date: Fri, 26 May 2023 20:02:23 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: arinc9.unal@...il.com
Cc: Sean Wang <sean.wang@...iatek.com>,
	Landen Chao <Landen.Chao@...iatek.com>,
	DENG Qingfang <dqfext@...il.com>,
	Daniel Golle <daniel@...rotopia.org>, Andrew Lunn <andrew@...n.ch>,
	Florian Fainelli <f.fainelli@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	Russell King <linux@...linux.org.uk>,
	Arınç ÜNAL <arinc.unal@...nc9.com>,
	Richard van Schagen <richard@...terhints.com>,
	Richard van Schagen <vschagen@...com>,
	Frank Wunderlich <frank-w@...lic-files.de>,
	Bartel Eerdekens <bartel.eerdekens@...stell8.be>,
	erkin.bozoglu@...ont.com, mithat.guner@...ont.com,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH net-next 27/30] net: dsa: mt7530: introduce BPDU trapping
 for MT7530 switch

On Mon, May 22, 2023 at 03:15:29PM +0300, arinc9.unal@...il.com wrote:
> From: Arınç ÜNAL <arinc.unal@...nc9.com>
> 
> The MT753X switches are capable of trapping certain frames. Introduce
> trapping BPDUs to the CPU port for the MT7530 switch.
> 
> BPDUs will be trapped to the numerically smallest CPU port which is affine
> to the DSA conduit interface that is set up. The BPDUs won't necessarily be
> trapped to the CPU port the user port, which these BPDUs are received from,
> is affine to.
> 
> Tested-by: Arınç ÜNAL <arinc.unal@...nc9.com>
> Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com>
> ---
>  drivers/net/dsa/mt7530.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
> index cd16911fcb01..2fb4b0bc6335 100644
> --- a/drivers/net/dsa/mt7530.c
> +++ b/drivers/net/dsa/mt7530.c
> @@ -2223,6 +2223,10 @@ mt7530_setup(struct dsa_switch *ds)
>  	val |= MHWTRAP_MANUAL;
>  	mt7530_write(priv, MT7530_MHWTRAP, val);
>  
> +	/* Trap BPDUs to the CPU port */
> +	mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
> +		   MT753X_BPDU_CPU_ONLY);
> +

If the switch doesn't currently trap BPDUs, isn't STP broken?

ip link add br0 type bridge stp_state 1
(with or without a userspace helper installed at /sbin/bridge-stp
for more modern protocols than the original 802.1D STP)

>  	/* Enable and reset MIB counters */
>  	mt7530_mib_reset(ds);
>  
> -- 
> 2.39.2
> 

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