lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <ZHIFgcxgh2quGxZj@corigine.com> Date: Sat, 27 May 2023 15:28:33 +0200 From: Simon Horman <simon.horman@...igine.com> To: Michal Smulski <msmulski2@...il.com> Cc: andrew@...n.ch, f.fainelli@...il.com, olteanv@...il.com, netdev@...r.kernel.org, Michal Smulski <michal.smulski@...a.com> Subject: Re: [PATCH net-next] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x On Fri, May 26, 2023 at 05:21:44PM -0700, Michal Smulski wrote: > Enable USXGMII mode for mv88e6393x chips. Tested on Marvell 88E6191X. > > Signed-off-by: Michal Smulski <michal.smulski@...a.com> ... > @@ -1477,7 +1481,8 @@ static int mv88e6393x_serdes_erratum_5_2(struct mv88e6xxx_chip *chip, int lane, > * to SERDES operating in 10G mode. These registers only apply to 10G > * operation and have no effect on other speeds. > */ > - if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER) > + if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER || > + cmode != MV88E6393X_PORT_STS_CMODE_USXGMII) Perhaps naïvely, this seems like it will always be true. Should it be: if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER && cmode != MV88E6393X_PORT_STS_CMODE_USXGMII)
Powered by blists - more mailing lists