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Message-Id: <20230529080840.1156458-2-yoshihiro.shimoda.uh@renesas.com>
Date: Mon, 29 May 2023 17:08:36 +0900
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To: s.shtylyov@....ru,
	davem@...emloft.net,
	edumazet@...gle.com,
	kuba@...nel.org,
	pabeni@...hat.com,
	robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org,
	geert+renesas@...der.be,
	magnus.damm@...il.com
Cc: netdev@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Subject: [PATCH net-next 1/5] dt-bindings: net: r8a779f0-ether-switch: Add ACLK

Add ACLK of GWCA which needs to calculate registers' values for
rate limiter feature.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
---
 .../bindings/net/renesas,r8a779f0-ether-switch.yaml    | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
index e933a1e48d67..cbe05fdcadaf 100644
--- a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
+++ b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
@@ -75,7 +75,12 @@ properties:
       - const: rmac2_phy
 
   clocks:
-    maxItems: 1
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: fck
+      - const: aclk
 
   resets:
     maxItems: 1
@@ -221,7 +226,8 @@ examples:
                           "rmac2_mdio",
                           "rmac0_phy", "rmac1_phy",
                           "rmac2_phy";
-        clocks = <&cpg CPG_MOD 1505>;
+        clocks = <&cpg CPG_MOD 1505>, <&cpg CPG_CORE R8A779F0_CLK_S0D2_HSC>;
+        clock-names = "fck", "aclk";
         power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
         resets = <&cpg 1505>;
 
-- 
2.25.1


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