netdev - Re: [PATCH net-next v4 1/4] net: mdio: Introduce a regmap-based mdio driver

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Date: Mon, 5 Jun 2023 09:37:21 +0200
From: Simon Horman <simon.horman@...igine.com>
To: Maxime Chevallier <maxime.chevallier@...tlin.com>
Cc: Mark Brown <broonie@...nel.org>, davem@...emloft.net,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	alexis.lothore@...tlin.com, thomas.petazzoni@...tlin.com,
	Andrew Lunn <andrew@...n.ch>, Jakub Kicinski <kuba@...nel.org>,
	Eric Dumazet <edumazet@...gle.com>, Paolo Abeni <pabeni@...hat.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	Vladimir Oltean <vladimir.oltean@....com>,
	Ioana Ciornei <ioana.ciornei@....com>,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Jose Abreu <joabreu@...opsys.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Giuseppe Cavallaro <peppe.cavallaro@...com>
Subject: Re: [PATCH net-next v4 1/4] net: mdio: Introduce a regmap-based mdio
 driver

On Thu, Jun 01, 2023 at 04:14:51PM +0200, Maxime Chevallier wrote:
> There exists several examples today of devices that embed an ethernet
> PHY or PCS directly inside an SoC. In this situation, either the device
> is controlled through a vendor-specific register set, or sometimes
> exposes the standard 802.3 registers that are typically accessed over
> MDIO.
> 
> As phylib and phylink are designed to use mdiodevices, this driver
> allows creating a virtual MDIO bus, that translates mdiodev register
> accesses to regmap accesses.
> 
> The reason we use regmap is because there are at least 3 such devices
> known today, 2 of them are Altera TSE PCS's, memory-mapped, exposed
> with a 4-byte stride in stmmac's dwmac-socfpga variant, and a 2-byte
> stride in altera-tse. The other one (nxp,sja1110-base-tx-mdio) is
> exposed over SPI.
> 
> Signed-off-by: Maxime Chevallier <maxime.chevallier@...tlin.com>

Reviewed-by: Simon Horman <simon.horman@...igine.com>