netdev - RE: [RFC PATCH v8 08/10] ice: implement dpll interface to control cgu

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <DM6PR11MB4657161D2871747A7B404EDD9B5FA@DM6PR11MB4657.namprd11.prod.outlook.com>
Date: Mon, 19 Jun 2023 20:34:12 +0000
From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>
To: Jiri Pirko <jiri@...nulli.us>
CC: "kuba@...nel.org" <kuba@...nel.org>, "vadfed@...a.com" <vadfed@...a.com>,
	"jonathan.lemon@...il.com" <jonathan.lemon@...il.com>, "pabeni@...hat.com"
	<pabeni@...hat.com>, "corbet@....net" <corbet@....net>, "davem@...emloft.net"
	<davem@...emloft.net>, "edumazet@...gle.com" <edumazet@...gle.com>,
	"vadfed@...com" <vadfed@...com>, "Brandeburg, Jesse"
	<jesse.brandeburg@...el.com>, "Nguyen, Anthony L"
	<anthony.l.nguyen@...el.com>, "M, Saeed" <saeedm@...dia.com>,
	"leon@...nel.org" <leon@...nel.org>, "richardcochran@...il.com"
	<richardcochran@...il.com>, "sj@...nel.org" <sj@...nel.org>,
	"javierm@...hat.com" <javierm@...hat.com>, "ricardo.canuelo@...labora.com"
	<ricardo.canuelo@...labora.com>, "mst@...hat.com" <mst@...hat.com>,
	"tzimmermann@...e.de" <tzimmermann@...e.de>, "Michalik, Michal"
	<michal.michalik@...el.com>, "gregkh@...uxfoundation.org"
	<gregkh@...uxfoundation.org>, "jacek.lawrynowicz@...ux.intel.com"
	<jacek.lawrynowicz@...ux.intel.com>, "airlied@...hat.com"
	<airlied@...hat.com>, "ogabbay@...nel.org" <ogabbay@...nel.org>,
	"arnd@...db.de" <arnd@...db.de>, "nipun.gupta@....com" <nipun.gupta@....com>,
	"axboe@...nel.dk" <axboe@...nel.dk>, "linux@...y.sk" <linux@...y.sk>,
	"masahiroy@...nel.org" <masahiroy@...nel.org>,
	"benjamin.tissoires@...hat.com" <benjamin.tissoires@...hat.com>,
	"geert+renesas@...der.be" <geert+renesas@...der.be>, "Olech, Milena"
	<milena.olech@...el.com>, "kuniyu@...zon.com" <kuniyu@...zon.com>,
	"liuhangbin@...il.com" <liuhangbin@...il.com>, "hkallweit1@...il.com"
	<hkallweit1@...il.com>, "andy.ren@...cruise.com" <andy.ren@...cruise.com>,
	"razor@...ckwall.org" <razor@...ckwall.org>, "idosch@...dia.com"
	<idosch@...dia.com>, "lucien.xin@...il.com" <lucien.xin@...il.com>,
	"nicolas.dichtel@...nd.com" <nicolas.dichtel@...nd.com>, "phil@....cc"
	<phil@....cc>, "claudiajkang@...il.com" <claudiajkang@...il.com>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>,
	"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, poros <poros@...hat.com>, mschmidt
	<mschmidt@...hat.com>, "linux-clk@...r.kernel.org"
	<linux-clk@...r.kernel.org>, "vadim.fedorenko@...ux.dev"
	<vadim.fedorenko@...ux.dev>
Subject: RE: [RFC PATCH v8 08/10] ice: implement dpll interface to control cgu

>From: Jiri Pirko <jiri@...nulli.us>
>Sent: Saturday, June 10, 2023 6:37 PM
>
>Fri, Jun 09, 2023 at 02:18:51PM CEST, arkadiusz.kubalewski@...el.com wrote:
>
>[...]
>
>
>>+static int ice_dpll_mode_get(const struct dpll_device *dpll, void *priv,
>>+			     enum dpll_mode *mode,
>>+			     struct netlink_ext_ack *extack)
>>+{
>>+	*mode = DPLL_MODE_AUTOMATIC;
>
>I don't understand how the automatic mode could work with SyncE. The
>There is one pin exposed for one netdev. The SyncE daemon should select
>exacly one pin. How do you achieve that?
>Is is by setting DPLL_PIN_STATE_SELECTABLE on the pin-netdev you want to
>select and DPLL_PIN_STATE_DISCONNECTED on the rest?
>
>
>[...]

AUTOMATIC mode autoselects highest priority valid signal.
As you have pointed out, for SyncE selection, the user must be able to manually
select a pin state to enable recovery of signal from particular port.

In "ice" case there are 2 pins for network PHY clock signal recovery, and both
are parent pins (MUX-type). There are also 4 pins assigned to netdevs (one per
port). Thus passing a signal from PHY to the pin is done through the MUX-pin,
by selecting proper state on pin-parent pair (where parent pins is highest prio
pin on dpll).

Thank you!
Arkadiusz