netdev - Re: [PATCH net-next v1 08/14] net: phy: nxp-c45-tja11xx: enable LTC sampling on both ext

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20230619081002.x6crxnx7c66z4hhe@soft-dev3-1>
Date: Mon, 19 Jun 2023 10:10:02 +0200
From: Horatiu Vultur <horatiu.vultur@...rochip.com>
To: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@....nxp.com>
CC: <andrew@...n.ch>, <hkallweit1@...il.com>, <linux@...linux.org.uk>,
	<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <richardcochran@...il.com>, <netdev@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <sebastian.tobuschat@....com>
Subject: Re: [PATCH net-next v1 08/14] net: phy: nxp-c45-tja11xx: enable LTC
 sampling on both ext_ts edges

The 06/16/2023 16:53, Radu Pirea (NXP OSS) wrote:

Hi Radu,

> 
> The external trigger configuration for TJA1120 has changed. The PHY
> supports sampling of the LTC on rising and on falling edge.

> 
> Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@....nxp.com>
> ---
>  drivers/net/phy/nxp-c45-tja11xx.c | 64 +++++++++++++++++++++++++++----
>  1 file changed, 56 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
> index 2160b9f8940c..6aa738396daf 100644
> --- a/drivers/net/phy/nxp-c45-tja11xx.c
> +++ b/drivers/net/phy/nxp-c45-tja11xx.c
> @@ -104,6 +104,10 @@
>  #define VEND1_PTP_CONFIG               0x1102
>  #define EXT_TRG_EDGE                   BIT(1)
> 
> +#define TJA1120_SYNC_TRIG_FILTER       0x1010
> +#define PTP_TRIG_RISE_TS               BIT(3)
> +#define PTP_TRIG_FALLING_TS            BIT(2)
> +
>  #define CLK_RATE_ADJ_LD                        BIT(15)
>  #define CLK_RATE_ADJ_DIR               BIT(14)
> 
> @@ -240,6 +244,7 @@ struct nxp_c45_phy_data {
>         const struct nxp_c45_phy_stats *stats;
>         int n_stats;
>         u8 ptp_clk_period;
> +       bool ext_ts_both_edges;
>         void (*counters_enable)(struct phy_device *phydev);
>         void (*ptp_init)(struct phy_device *phydev);
>         void (*ptp_enable)(struct phy_device *phydev, bool enable);
> @@ -682,9 +687,52 @@ static int nxp_c45_perout_enable(struct nxp_c45_phy *priv,
>         return 0;
>  }
> 
> +static void nxp_c45_set_rising_or_falling(struct phy_device *phydev,
> +                                         struct ptp_extts_request *extts)
> +{
> +       /* Some enable request has only the PTP_ENABLE_FEATURE flag set and in
> +        * this case external ts should be enabled on rising edge.
> +        */
> +       if (extts->flags & PTP_RISING_EDGE ||
> +           extts->flags == PTP_ENABLE_FEATURE)
> +               phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
> +                                  VEND1_PTP_CONFIG, EXT_TRG_EDGE);

With this patch, are you not changing the behaviour for TJA1103?
In the way, before there was not check for extts->flags ==
PTP_ENABLE_FEATURE and now if that is set you configure to trigger on
raising edge. If that is the case, shouldn't be this in a different
patch?

> +
> +       if (extts->flags & PTP_FALLING_EDGE)
> +               phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
> +                                VEND1_PTP_CONFIG, EXT_TRG_EDGE);
> +}
> +
 

-- 
/Horatiu