netdev - Re: [PATCH] net: phy: Enhance fixed PHY to support 10G and 5G

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Date: Fri, 23 Jun 2023 15:29:13 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Revanth Kumar Uppala <ruppala@...dia.com>,
	Russell King <rmk+kernel@...linux.org.uk>
Cc: "hkallweit1@...il.com" <hkallweit1@...il.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	Narayan Reddy <narayanr@...dia.com>
Subject: Re: [PATCH] net: phy: Enhance fixed PHY to support 10G and 5G

On Fri, Jun 23, 2023 at 12:28:49PM +0000, Revanth Kumar Uppala wrote:
> 
> 
> > -----Original Message-----
> > From: Andrew Lunn <andrew@...n.ch>
> > Sent: Wednesday, June 21, 2023 11:00 PM
> > To: Revanth Kumar Uppala <ruppala@...dia.com>
> > Cc: hkallweit1@...il.com; netdev@...r.kernel.org; linux-
> > tegra@...r.kernel.org; Narayan Reddy <narayanr@...dia.com>
> > Subject: Re: [PATCH] net: phy: Enhance fixed PHY to support 10G and 5G
> > 
> > External email: Use caution opening links or attachments
> > 
> > 
> > On Wed, Jun 21, 2023 at 10:28:53PM +0530, Revanth Kumar Uppala wrote:
> > > Add 10G and 5G speed entries for fixed PHY framework.These are needed
> > > for the platforms which doesn't have a PHY driver.
> > >
> > > Signed-off-by: Revanth Kumar Uppala <ruppala@...dia.com>
> > > Signed-off-by: Narayan Reddy <narayanr@...dia.com>
> > 
> > This is the second time you have sent me this patch. You have failed to answer
> > the questions i asked you the last time.....
> Apologies for sending twice.
> C45 registers are not defined in the kernel as of now. But, we need to display the speed as 5G/10G when the same is configured as fixed link in DT node.
> It will be great if you can share any data for handling this.
> As of now, with this change we have taken care of providing proper speed log in kernel when 5G/10G is added as fixed links in DT node.

This is architecturally wrong. As i said, swphy emulates a C22 PHY,
and a C22 PHY does not support speeds greater than 1G. To make swphy
really support 5G and 10G, you would need to add C45 support, and then
extend the default genphy driver to look at the C45 registers as well.

However, that is all pointless. As i said, phylink fixed-link is not
limited to 1G speeds. Given what i see in Cc: i assume this is for a
tegre SoC? And that uses a Synopsys MAC? So you probably want to
modify the dwc driver to use phylink.

    Andrew